IC Layout Engineer

3 months ago

Bengaluru, India Whitefield Careers Full time
Overview:The IC LayoutEngineer plays a crucial role in the organization by designing anddeveloping integrated circuit layouts ensuring the physicalimplementation meets the design specifications and qualitystandards. They collaborate with crossfunctional teams to deliverhighquality products while adhering to project timelines andengineering principles.KeyResponsibilities:
  • Design andimplement IC layouts using industrystandard EDAtools.
  • Collaborate with design engineers tounderstand design requirements andconstraints.
  • Perform layout vs. schematic (LVS)and design rule checking (DRC) to ensure layout accuracy andintegrity.
  • Optimize layout designs forperformance area and manufacturability.
  • Conductphysical verification and debug layouterrors.
  • Coordinate with process engineers toaddress technology nodespecific layoutrequirements.
  • Support tapeout activities andengage in postlayout extraction andsimulations.
  • Stay updated with emerging IClayout methodologies and tools.
  • Contribute todesign reviews and provide layout designrecommendations.
  • Document design and layoutprocesses methodologies and bestpractices.
RequiredQualifications:
  • Bachelors or Mastersdegree in Electrical Engineering Computer Engineering or relatedfield.
  • Proven experience in IC layout designfor analog/mixedsignal integratedcircuits.
  • Proficiency in using Cadence Virtuosoand layout automation tools.
  • Strongunderstanding of semiconductor process technology and layouteffects.
  • Indepth knowledge of DRC/LVS checksand physical verificationmethodologies.
  • Ability to optimize layout forreliability signal integrity andmanufacturability.
  • Experience with parasiticextraction tools and postlayoutsimulation.
  • Excellent problemsolving andanalytical skills in resolving layoutissues.
  • Good understanding of EDA tool flowsand scripting languages like Skill andPerl.
  • Effective communication skills and theability to work in a collaborative teamenvironment.

skill scripting,physicalverification,lvs,layout effects,layout design,collaboration,designengineering,tape-out activities,post-layout extraction,cadencevirtuoso,perl scripting,ic layout design,layout optimization,edatools,drc,parasitic extraction,semiconductor processtechnology,simulation,communication skills

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