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Exciting Opportunity For DFT Engineers
2 weeks ago
We are currently hiring for an exciting opportunity at Eximietas Design for DFT Engineers with strong experience in ASIC/SoC design and test methodologies.
Job Title: DFT Engineer
Experience: 8+ Years
Locations: Bangalore | Ahmedabad
Job Description:
We are looking for an experienced DFT (Design for Test) Engineer to join our team at Eximietas Design. The successful candidate will be responsible for designing and implementing robust test architectures for complex ASIC/SoC designs, ensuring high test coverage and quality deliverables.
Key Responsibilities:
- Architecture and Scan Insertion at the RTL and/or gate-level for various clock domains and hierarchical designs, adhering to strict timing and area constraints.
- Perform comprehensive DFT DRC (Design Rule Checking) and collaborate closely with the design teams to resolve violations.
- Execute Automatic Test Pattern Generation (ATPG) for stuck-at, transition, and other advanced fault models to achieve aggressive fault coverage targets.
- Conduct pattern simulations with and without timing to validate test vectors.
- Design, integrate, and verify Memory Built-In Self-Test (MBIST) controllers and collar logic for various memory types.
- Work with iJTAG (IEEE 1500/1687 standards) for core access and implementing hierarchical test solutions.
- Analyze and resolve issues related to Simultaneous Switching Noise (SSN).
- Implement and validate JTAG Boundary Scan; provide ATE bring-up support.
- Knowledge of ICL/PDL is an added advantage.
Tools Expertise:
- Mentor/Siemens Tessent
- Synopsys Tetramax / DFT Compiler
- Cadence Encounter Test
