Altera - Senior Design Verification Engineer

Job Description

Job Details: :

Altera, an Intel Company, is seeking a highly skilled Senior Verification Engineer to ensure the design and implementation excellence of next-generation configuration controllers for top-tier FPGAs. This role offers the opportunity to make a significant impact at a tech-driven company that provides leading programmable solutions, easily deployable in applications ranging from cloud to edge, unlocking limitless AI possibilities.

• Understand design specifications and implementations, define the verification scope, create test plans and tests, build the verification infrastructure, and ensure the design's correctness
• Take ownership of verifying the ASIC design, architecture, golden models, and micro-architecture of configuration controllers at the IP and sub-system levels using advanced verification methodologies like UVM
• Develop reusable bus functional models, monitors, checkers, and scoreboards in line with coverage-driven verification methodologies
• Collaborate closely with architects, designers, and both pre- and post-silicon verification teams to achieve your objectives

In Q4 2023, Intel announced PSG will be reported as a separate business unit beginning on January 1, 2024 with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• B.Tech./M.Tech or equivalent education
• 10 years of relevant experience
• Proficient in verification at the unit/sub-system/SOC level, with strong knowledge of Verilog and SystemVerilog
• Expertise with UVM DV methodology and industry-standard verification tools for simulation and debugging
• Independently debug, root-cause and report issues
• Experienced in creating and working within functional coverage-based constrained random verification environments
• Expertise in code coverage analysis
• Expertise with standard IPs and Protocol verification (e.g., AXI, DMA etc.)

Preferred Qualifications:

• Hands-on with CPU C-based verification
• Hands-on with GLS (Gate Level Simulation) and Power-aware Simulation
• Experience with scripting languages like Perl, Python, or similar
• Excellent interpersonal skills and a passion for collaborative teamwork

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations: Business group:

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Locations - SRR4 - SRR4 - Sarjapur 4

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