Lead Chip Validation Engineer

3 days ago

Bengaluru, Karnataka, India Broadcom Full time ₹ 20,00,000 - ₹ 25,00,000 per year

Job Description:

  • MSEE/BSEE with 8+ years in chip validation.
  • Experience with PCIe Gen5/6 designs and its Silicon validation is required
  • Experience in planning the Si validation process and creating realistic schedule estimates.
  • Strong experience in high level Object Oriented with C/C++, System Verilog is must
  • Experience with debug of SW drivers, HW designs and FW code is required
  • Experience with debug uC based chips and FW is a plus
  • Experience with test bench environments such as UVM or any equivalent will be a great advantage
  • Experience in validating complex designs blocks like high-speed ADCs, High speed interfaces, PLL, multi clock, reset domain designs and mixed signal interfaces is a big plus.
  • Experience in understanding standards like PCI-SIG and its validation, knowledge of PCIE protocol and its physical layer implementations/SERDES is a big plus.
  • Knowledge of Ethernet IEEE 802.3 Physical layer clauses like Cl.72, 93, 91 etc. is preferred
  • Deeper understanding of PLLs/CDR concepts/AMS interfaces and networking IP designs are preferred.
  • Experience writing tests, scripting languages such as PERL, TCL Unix Scripting and managing regression analysis
  • Strong debugging skills of Verilog RTL & test environment is desired
  • Able to adopt the use of new techniques and methodologies and promote their use within the project.
  • Shall be pro-activity, self-organized, drive solutions and ability to works with teams/leads across time zones

R022916

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