Physical Design Engineer

7 days ago

Bengaluru, Karnataka, India Semi leaf Full time ₹ 12,00,000 - ₹ 36,00,000 per year

Physical Design Engineer Block-Level (PnR)

Job Summary :

We are looking for a highly motivated Physical Design Engineer with a solid background in block-level place and route (PnR) to join our silicon implementation team.

The ideal candidate will have at least 6 years of experience in block-level physical design with proven expertise in timing closure, DRC/LVS, and performance optimization.

This role will involve working on advanced technology nodes and collaborating closely with RTL, DFT, STA, and power teams to ensure successful design implementation.


Experience with AMD flows is a significant plus.

Required Qualifications :


- 6+ years of hands-on experience in block-level physical design using tools such as Synopsys ICC2, Cadence Innovus, or equivalent.

- Strong understanding of PnR flows, including floorplanning, placement, CTS, routing, and optimization.

- Proficient in timing concepts, static timing analysis (STA), and logic equivalence checks (LEC).

- Experience in DRC/LVS closure and handling design signoff at advanced technology nodes.

- Proven ability to manage power, performance, and area (PPA) optimizations at the block level.

- Solid understanding and experience with ECO flows, including physical and functional ECO implementation.

- Excellent problem-solving skills and ability to collaborate effectively with cross-functional teams.

- AMD flow experience is a strong plus.

Preferred Qualifications :


- Exposure to low-power design methodologies, including multi-voltage domains and power gating.

- Experience working on advanced nodes (e.g., 7nm, 5nm, or below).

- Knowledge of clock domain crossing (CDC) issues and mitigation techniques.

- Familiarity with scripting languages (TCL, Perl, Python) to automate physical design tasks and flows.

- Experience with design partitioning, hierarchical implementation, and block integration at the top level.

- Familiarity with EM/IR analysis and thermal-aware design considerations.

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