Staff EDA SW Dev Engineer

10 hours ago

Pune, Maharashtra, India Lattice Semiconductor Full time ₹ 12,00,000 - ₹ 36,00,000 per year

Lattice Overview
There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a "team first" organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for.

Responsibilities & Skills
Lattice is seeking candidates for the position of Staff Software Development Engineer in FPGA place and route. This is a full-time position located in Pune, India.

Summary
The successful candidate will join a team designing and developing Lattice FPGA software tools. The candidate will contribute to delivering software solution for Lattice FPGA development with emphasis on place and route tools. The candidate is expected to be an expert in place and route engine development with experience in optimizing QoR (performance, Area, Runtime as well as memory utilization) for a given FPGA architecture. The candidate will team up with other developers and develop place and route tools for various FPGA products. The responsibility also includes customer support and software feature development. The candidate is expected to maintain existing software products and interact with other teams to facilitate a value added solution too.

Accountabilities

  • Responsible for place and route engine quality improvement
  • Responsible for place and route feature and capability development
  • Responsible for Lattice new FPGA product support
  • Create unit tests to validate implementation and ensure high quality

Qualifications

  • BS/MS/PhD in Electrical Engineering or Computer Science or Computer Engineering
  • Proficient with C/C++, data structure, graph algorithms, logic design and shell scripts
  • Strong background and experience in data structures and algorithms
  • Experience of place and route engine development in either FPGA or ASIC domain is a must
  • Experience of FPGA place and route engine development is ideal
  • Strong written and verbal communication skills, and collaboration skill
  • Experience of multi-processing development is a plus
  • Solid understanding in FPGA architectures is a plus
  • 10+ years of experience in EDA tool (preferably, place and route) development

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