Lead Design Verification

2 days ago

Hyderabad, Telangana, India Silicon Labs Full time ₹ 12,00,000 - ₹ 36,00,000 per year

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at 

About the Role
We are looking for a seasoned Verification Engineer to lead the design, development, and deployment of UVM/C-based testbenches for cutting-edge multi-core, multi-threaded processor subsystems. This role emphasizes performance, power, and functional verification of SoCs and chipsets built on ARM Cortex and proprietary processor technologies.

Key Responsibilities

  • Architect and implement chip-level testbenches for SoC verification.
  • Lead pre-silicon verification efforts and manage a team of verification engineers.
  • Develop and execute comprehensive test plans aligned with product requirements.
  • Run and maintain regression suites; triage and debug test failures.
  • Create directed (C), constrained-random (UVM), and formal verification tests.
  • Perform gate-level simulations and provide activity files for power analysis.
  • Collaborate with global teams and design leads; provide weekly status updates.

Required Skills & Experience

  • Bachelor's or master's in electrical/computer engineering with 12–15 years of industry experience in SoC verification.
  • Proficient in Verilog, SystemVerilog, UVM, and C/C++.
  • Experience with assertions, constrained-random testing, and coverage analysis.
  • Skilled in scripting (Perl, Python, Tcl, Shell) for automation.
  • Deep understanding of SoC, memory, and cache architectures.
  • Experience with low-power design, UPF, and gate-level simulations.
  • Familiarity with RNM and mixed-signal modeling.

Preferred Qualifications

  • Experience with high-speed interfaces (Quad/Octa-SPI).
  • Familiarity with peripheral interfaces (SDIO, UART, I2S, I3C, PWM, CAN).
  • Exposure to wireless technologies (WLAN, Bluetooth, ZigBee).
  • Strong mentoring and leadership skills.
  • Excellent analytical and communication abilities.

Benefits & Perks:

Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.

  • Equity Rewards (RSUs)
  • Employee Stock Purchase Plan (ESPP)
  • Insurance plans with Outpatient cover
  • National Pension Scheme (NPS)
  • Flexible work policy
  • Childcare support

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.

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