RTL Design Engineer

2 weeks ago


Greater Bengaluru Area, India Mulya Technologies Full time ₹ 15,00,000 - ₹ 20,00,000 per year

IP/RTL Design Engineer for ARM CMN Fabric and Neoverse

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore

Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market.

Position Overview

Seeking an IP/RTL Design Engineer with 8+ years of experience to design IP/RTL for ARM Neoverse-based SoCs, focusing on CMN fabric, using Socrates for configuration, targeting AI/HPC datacenter applications.

Key Responsibilities

  • Design IP blocks for ARM Neoverse SoCs, integrating CMN fabric (e.g., CMN-700/S3) for cache coherence and interconnect.
  • Develop Verilog/SystemVerilog RTL for high-performance, low-latency designs.
  • Configure CMN topologies using Arm Socrates for optimized performance and scalability.
  • Implement protocols like AMBA CHI, ACE, CXL, PCIe for coherent interconnects.
  • Optimize designs for bandwidth, latency, and power in AI/HPC workloads.
  • Support synthesis, timing closure, and FPGA prototyping and Design Verification team
  • Document microarchitecture and design specifications.

Required Qualifications

  • Education: BS/MS/PhD in Electronics/Computer Engineering.
  • Experience: 10+ years in ASIC/FPGA IP/RTL design, 8-12 years with ARM Neoverse and CMN fabrics (e.g., CMN-600/700/S3).
  • Skills:
  • Expert in Verilog/SystemVerilog RTL design.
  • Deep knowledge of ARM Neoverse (V1/V3/N2/N3) and CMN interconnects.
  • Deep understanding in system architecture, coherence and cache
  • Experience with Arm Socrates for CMN configuration.
  • Proficiency in AMBA CHI, CXL, PCIe, or CCIX protocols.
  • Familiarity with synthesis and timing tools (e.g., Synopsys Design Compiler).
  • Experience with AI/HPC or datacenter SoC design.
  • Knowledge of DDR5, HBM3, or chiplet-based architectures.
  • Familiarity with UALink or Ultra Ethernet.
  • Strong problem-solving and collaboration skills.

Contact: Sumit S. B.

"Mining the Knowledge Community"



  • Greater Bengaluru Area, India Mulya Technologies Full time ₹ 20,00,000 - ₹ 25,00,000 per year

    Staff / Principal RTL Design Engineer :-BangaloreFounded in 2023,by Industry veterans HQ in California,USLocation: Greater Bengaluru Area(Company Description:We are product based startup. The products are chipsets and intelligent machines that enable scalable enterprises AI, streaming video intelligence, training trillion parameter models, and fine-tuning...

  • RTL Design Engineer

    2 weeks ago


    Greater Bengaluru Area, India ACL Digital Full time ₹ 9,00,000 - ₹ 12,00,000 per year

    Candidate should be with strong RTL design experience.Strong design Experience in Ethernet IPs or *Ethernet* protocol domain.knowledge in Verilog/VHDL languagesscripting languages TCL/Perl/python any one.Knowledge of AXI Protocols.

  • RTL Microarchitect

    2 weeks ago


    Greater Bengaluru Area, India Mulya Technologies Full time ₹ 10,00,000 - ₹ 30,00,000 per year

    Microarchitect & RTL Design EngineerWe are a fast-moving Series B startup built by serial entrepreneurs with a vision to accelerate intelligent computing in the emerging chiplet era. We focus on software-driven, unified fabric solutions for single-die and multi-die systems.We design and license disruptive intellectual property for use in semiconductor chips,...


  • Greater Hyderabad Area, India Mulya Technologies Full time

    Principal IP/RTL Design Engineer for TPU / GPU Hyderabad / Bangalore Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. Position Overview Seeking an IP/RTL Design Engineer with 5+...


  • Bengaluru, India Cadence System Design and Analysis Full time

    RTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...


  • Bengaluru, India Cadence System Design and Analysis Full time

    RTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...


  • Bengaluru, India Cadence System Design And Analysis Full time

    RTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...


  • Bengaluru, India Cadence System Design and Analysis Full time

    RTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...

  • RTL Microarchitect

    4 weeks ago


    Greater Bengaluru Area, India Mulya Technologies Full time

    Microarchitect & RTL Design EngineerWe are a fast-moving Series B startup built by serial entrepreneurs with a vision to accelerate intelligent computing in the emerging chiplet era. We focus on software-driven, unified fabric solutions for single-die and multi-die systems. We design and license disruptive intellectual property for use in semiconductor...


  • Bengaluru, India Cadence System Design and Analysis Full time

    RTL Design Engineer for Interface Controller IP development team. Position is based in Bangalore or Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...