IO Mixed Signal Design Engineer
2 hours ago
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B) global organization? We offer all that and more at Microchip Technology Inc.
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Job Description
As a member of Microchip's engineering community, the IO mixed signal design engineer will be responsible for integration and verification of mixed signal blocks in high-speed IO's in FPGA's. The successful candidate will also be involved in IO block and top level design integration and verification.
Duties & Responsibilities
- Develop analog circuits for high-speed DDR and other IO applications in advanced FinFET nodes
- Work with IO lead to understand the design requirements and translate them into circuit architectures and implement and simulate them.
- Circuit design, simulation and optimization of various IO blocks such as clocking (PI, DLL, PLL), CTLE, VGA, Tx, Rx, DFE, etc.
- Develop the calibration and training algorithms of various sub-blocks in the IO's to meet high-speed performance.
- Work closely with layout engineers on floorplan and placement of their designs. Create efficient power delivery and signal routing topology to reduce congestion.
- Create Verilog and functional models for their designs. Perform AMS simulation to verify functionality of designs.
- Evaluate new design architectures and circuit implementation techniques to continuously improve the current and future IO design.
- Support IO Mixed-Signal IP through post-tapeout phase, including lab testing, customer bring-up and debug
Requirements/Qualifications
Experience Required
- 8+ years of experience in design and verification of mixed signal blocks in complex SoC.
- Experience with Virtuoso schematic capture tool.
Requirements
- Minimum of 6years of successful prior IO development and verification efforts.
- Competency in HSPICE, co-sim, and testbench generation and simulation.
- Knowledge about high-speed design techniques (DDRx, PCI-e, USB) and calibrations from an architectural and circuit design standpoint.
- Demonstrated competency in scripting, managing simulation queues, and data capture plus presentation using Microsoft Office tools, including Excel.
- Power analysis.
- Good analytical, oral and written communication skills
- Able to write clean, readable presentations.
- Self-motivated, proactive team player.
- Ability to work to schedule requirements.
Beneficial Experience
- Experience in ASIC methodology and familiarity with ASIC tools like Innovus and Tempus.
- Experience with FPGA is preferred.
- Experience with Memory interfaces and SerDes interfaces.
- Familiarity with DFT and place and route.
Travel Time
No Travel
To all recruitment agencies
:
Microchip Technology Inc.
does not
accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
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