SOC Verification Engineer: CLK RST

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SENIOR SILICON DESIGN ENGINEER

• THE ROLE (SOC Verification Engineer: SOC CLK RST & Power Management):

• Work on SOC level verification activities, the person will be responsible for bringup verification of CLK across SOC, RST across SOC, Power gating across soc and UPF simulation at SOC. Work with testbench team to bringup required infra Structure to bring up testbench and simulation.

• He will be responsible to coordinate with Design team for UPF delivery, work with design (IP, Subsystem, SOC) for quality UPF delivery and resolve issues.
• He should have good understanding of CLK, RST and power architecture and UPF's
• He will be responsible to create TB collaterals for CLK, RST, Power gating and NLP simulation bringup.

The Person

• Engineer with strong self-driving ability.
• Need excellent communication skills (both written and oral)
• Strong problem-solving skills, go to person for SOC testbench, Power management, UPF, C/C++ Coding, UVM coding, Testcase coding, checkers and assertions.

Key Responsibilities

• CLK, RST, Power management and NLP Simulation bringup (Has responsibility of TB, Testcase, coordination between design and dv team)
• Power verification is key responsibility.
• Work with power architects to resolve issues seen in simulation.

Preferred Experience

• Good understanding of CLK, RST Architectures, AVFS, DVFS etc…
• Expertise in IP, Subsystem and SOC Verification with specialization in NLP Simulation.
• NLP Simulation is must requirement.
• Strong hands-on experience in different SOC Verification activities, NLP Simulation, Power verification, UVM, System Verilog, X86, C++, HW/SW co-verification, Scripting (phython) Test plan review, Debug/triage, Coverage, Strong Problem Solving, Automation and Debugging Skills, System bus protocol understanding including some of the common IPs like ACE, CHI, AXI, PCIe, DDR, memory controller etc.
• Comfortable with design/verification tools and flows like VCS, Verdi, SOC Connectivity, SV assertions, HW-SW co-simulations, UPF/CPF flows etc.
• Strong understanding of System integration, Make file flow, Verification Methodologies, Boot up sequence.
• JIRA based project management is a plus.

Academic Credentials

• BE/B.Tech/ME/MTECH/MS or equivalent in ECE/EEE/CSE
• 5-10 years of strong DV experience in CLK, RST verification, NLP simulation, IP, Sub System & SOC Verification, Power management verification

Benefits offered are described:
AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.