ASIC Design Engineer
17 hours ago
ASIC Engineer IV ASIC Design Engineer
Location: Bangalore
Experience: 6+ years
Responsibilities
- Architect and design high-performance networking ASIC blocks
- Develop micro-architecture and RTL using Verilog
- Optimize designs for throughput, power, and area
- Collaborate with verification and physical design teams for timing closure and debug
Required Skills
- 6+ years of ASIC design experience
- Strong Verilog RTL skills
- Experience with Design Compiler, LEC, Spyglass
- Knowledge of networking protocols (Ethernet/FCoE), memory subsystems, and clock-domain crossings
- Strong debugging and communication skills
- BSEE/MSEE required
ASIC Engineer – Staff (Design Verification)
Experience: 6+ years
Responsibilities
- Architect and develop block/subsystem/full-chip verification environments
- Build and execute SystemVerilog UVM testbenches
- Drive functional, code, and gate-level coverage to tape-out signoff
- Debug complex ASIC issues in collaboration with design teams
- Enhance verification infrastructure using scripting
Required Skills
- Strong ASIC verification experience using SystemVerilog & UVM
- Expertise in constrained-random verification
- Experience with simulators (VCS/NC)
- Perl/Python/Tcl scripting
- Networking protocol verification (Ethernet preferred)
- Strong debugging skills
- BSEE/MSEE required
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