RTL Engineer

7 days ago

Greater Bengaluru Area, India Ambit Semiconductors Private Limited Full time ₹ 20,00,000 - ₹ 25,00,000 per year

Company Description

Ambit Semiconductors Private Limited offers semiconductor design and intellectual property design services to global clients using an Offshore Design Centre (ODC) approach. This approach ensures close communication and coordination between the client's teams and Ambit's ambitions. The founders' passion for innovation has led to successful partnerships with valued clients and the mastering of new and emerging technologies in the semiconductor design space.

Position: RTL Architect – SERDES

Location: USA (Onsite/Hybrid)

Experience
years

Key Responsibilities

  • Define and own the RTL architecture for high-speed and many lanes SERDES IPs.
  • Lead RTL design, coding, and integration of SERDES blocks.
  • Collaborate with analog, verification, PD, and validation teams to ensure seamless integration and successful silicon bring-up.
  • Drive micro-architecture development, specification reviews, and design documentation.
  • Perform lint, CDC, and synthesis checks to ensure design quality.
  • Support post-silicon validation and debug efforts.
  • Mentor junior engineers and provide technical leadership in design reviews.

Required Qualifications

  • Bachelor's or Master's degree in Electrical Engineering or related field.
  • 8+ years of experience in RTL design/architecture, with direct hands-on expertise in SERDES design (PAM4/NRZ, PCIe, Ethernet, CXL, etc.).
  • Strong understanding of high-speed serial interfaces, clocking, and data-path architecture.
  • Proficiency in Verilog/System Verilog for RTL coding.
  • Proficiency in modelling with MATLAB.
  • Solid knowledge of ASIC design flow, including synthesis, STA, and physical design considerations.
  • Knowledge of simulation and verification methodologies (UVM, assertions, coverage).
  • Strong analytical/debugging skills and ability to work cross-functionally.

Preferred Skills

  • Experience with advanced process nodes.
  • Familiarity with DFT, low-power design techniques, and ECO flows.
  • Exposure to system-level architecture for networking, HPC, or data center applications.
  • Strong communication and leadership skills.

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