Senior Engineer

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at 

Meet the team

   You will be joining global  AMS  team.  This team is responsible for development of  high performance  Mixed signal blocks ,and The Team overlooks physical implementation and integration of the blocks in the IC. This team also overlooks Validation and works closely with Architects and Application Engineers to derive Specs.  

Job Description

• Define architecture and implement transistor-level design of analog and mixed-signal blocks for Power efficient  Iot ICs 
• Drive system-level specification and partitioning in collaboration with Systems and Application teams
• Perform pre- and post-layout simulations and analysis across PVT corners using industry-standard EDA tools
• Work closely with layout engineers to optimize performance, area, and noise/EMI sensitivity
• Collaborate with cross-functional teams across design, verification, test, validation,
• Support silicon bring-up, characterization, and debug
• Mentor junior designers
• Produce high quality review and spec documents
• Promote IP reuse, documentation best practices, and patent/IP generation initiatives 

    Qualifications

•  Master's, or PhD in ECE or related field
• 5+ years of hands-on experience in analog/mixed-signal IC design, with a focus on low power designs 
• Deep expertise in analog circuit design, and system-level integration
• Strong experience with Cadence tools and analog simulation methodologies
• Demonstrated leadership in delivering complex designs from concept to production
• Excellent problem-solving, communication, and collaboration skills
• Experience with 22nm / 40nm  is a plus
• Proven track record of successful silicon tape-outs and production ramp
• Knowledge of industry design standards and practices for reliability and safety
• Understanding of layout impact on analog performance and EMC/EMI mitigation 

Benefits & Perks:

Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.

• Equity Rewards (RSUs)
• Employee Stock Purchase Plan (ESPP)
• Insurance plans with Outpatient cover
• National Pension Scheme (NPS)
• Flexible work policy
• Childcare support

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.