
LEC / CLP Lead Engineer
1 week ago
Role Overview:
We are seeking a highly experienced
LEC / CLP Lead Engineer
with over 8 years of expertise in
Logic Equivalence Check (LEC)
and
Conformal Low Power (CLP)
methodologies. The role requires strong leadership skills to drive sign-off, ensure low-power intent verification, and lead a team in delivering high-quality SoC designs.
Key Responsibilities:
Lead
Logic Equivalence Check (LEC)
and
Low Power verification (CLP)
activities across block and full-chip levels.Define and implement
LEC/CLP methodologies
using industry-standard tools (Cadence Conformal, Synopsys Formality, etc.).Validate low-power architecture,
UPF/CPF constraints
, and intent across multiple domains.Collaborate with RTL, Synthesis, and Physical Design teams to resolve mismatches.
Review and debug
LEC/CLP failures
to drive sign-off closure.Automate verification flows using
Python/Perl/TCL scripting
.Mentor and guide junior engineers in LEC and CLP methodologies.
Ensure smooth delivery of sign-off requirements and meet project schedules.
Required Skills & Experience:
8+ years of hands-on experience in
LEC and CLP verification
.
Expertise with tools like
Cadence Conformal, Synopsys Formality, or equivalent
.
Strong understanding of
RTL-to-netlist equivalence
,
low-power UPF/CPF verification
, and
multi-power domain SoCs
.Proven track record in debugging
LEC/CLP failures
and collaborating across design teams.Proficiency in
scripting (Python, Perl, TCL)
for automation.Strong analytical, problem-solving, and leadership skills.
Preferred Qualifications:
Master's or Bachelor's in
Electronics / Electrical / VLSI Engineering
.Experience in advanced nodes (7nm and below).
Exposure to
low-power design methodologies
and
complex SoC projects
.
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