
Hiring Lead Engineer: ASIC/SOC/IP Verification
1 week ago
Role & responsibilities :
- Lead /manage SoC/IP/Package-level verification projects, ensuring quality and timely delivery.
- Architect and drive UVM-based verification environments and methodologies.
- Define verification strategies, develop test plans, and ensure signoff criteria (functional & code coverage, power analysis, GLS) are met.
- Collaborate cross-functionally with design, DFT, physical design, and software teams to ensure robust verification coverage and silicon success.
- Manage team deliverables, mentor junior engineers, and provide technical guidance.
- Interface with stakeholders for project scoping, scheduling, and resource allocation.
- Drive silicon debug, pattern verification, and post-silicon validation efforts.
- Ensure alignment with industry best practices, including low power verification (PTPX, Spyglass) and high-speed interface validation.
Preferred candidate profile
- 7+ years of experience in ASIC/SoC verification .
- Proven track record of leading teams to successful silicon tape-outs .
- Hands-on expertise in UVM, SystemVerilog, Assertions, functional and code coverage closure.
- Strong understanding of SoC architecture with ARM cores (e.g., Cortex-M4, M6, ARM926EJ-S).
- Experience in verification of high-speed protocols (SATA, PCIe), AMBA protocols (AXI, AHB, APB), and standard interfaces..
- Excellent people management, project planning, and stakeholder communication skills.
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