Staff Engineer, Verification

About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact
Marvell Central Engineering (CE) develops Marvell most advanced High-Speed SerDes (HSS) IPs covering multiple applications, Switch, Automotive, Storage, Optics, etc. Acting as the engine to the company, Central Engineering provides the source of power to every business unit in Marvell system. Central Engineering AMS(CE AMS) is responsible of developing Marvell SerDes IPs and supporting all Marvell business units for fast and smooth SoC production.

What You Can Expect
Essential Responsibilities (not limited to):

• Responsible for understanding the logic, develop hitlist, verification environment, testcases etc., required for verifying the logic, individually
• Implement verification methodologies for testbench development
• Develop scripts required for running simulations and regressions and debug fails
• Document the verification plan and verification documentation
• Plan functional coverage/code coverage, analyze and improve coverage
• Review and update verification environment and testcases
• Report, track and close logic issues
• Work and communicate effectively with global team
• Work with designers and FW engineers to enable better verification

Essential Qualifications
What We're Looking For

• Must have good digital logic understanding and fundamentals of digital design.
• Candidate must have excellent skills in digital logic verification and hardware description language (VHDL or Verilog),
• Strong knowledge in object oriented programming using languages such as SystemVerilog
• Must have hands on experience in hardware verification methodologies such as UVM or OVM,
• Must be familiar with verification test planning and coverage driven verification closure, Verification strategies for directed and randomized testing and assertions
• Must have good experience in using simulation tools and proficiency in simulation debug techniques.
• Strong knowledge / experience in building the verification environment from specification and should have spec to hardware bring-up experience.
• Must have hands on knowledge on test-bench development and automation, bug tracking, and regression mechanisms
• Should be able to act as the team lead to determine methods and procedures on new assignments and coordinate activities of other team members to ensure successful project completion.

Preferred Skills

• Experience in High Speed SerDes, clock data recovery based PHYs, Asynchronous clock domain crossing verification.
• IP architecture and verification knowledge
• Experience in scripting languages such as Perl
• Gatelevel simulation and AMS simulation knowledge
• Experience with Linux operating system
• Experience with Cadence or any other industry tools
• Should be a good team player
• Good communication skills and quick learning ability.
• Knowledge of standard configuration management system like CVS or SVN

Education

• Bachelor's degree in Computer Science, Electrical Engineering or related fields and 5-8 years of related professional experience.
• Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 4-6 years of experience.

Additional Compensation And Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity
As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.
Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.