Senior Emulation Engineer
2 weeks ago
Job Title: Emulation / Verification Engineer (Zebu / Palladium Platforms)
Job Summary:
We are looking for an experienced Emulation Engineer to join our SoC Design Verification team. The ideal candidate will work on emulation setup, validation, and debug using leading emulation platforms such as Synopsys ZeBu and Cadence Palladium. You will collaborate closely with design, verification, and software teams to enable early hardware/software co-verification and accelerate silicon bring-up.
Roles and Responsibilities:
- Set up and maintain emulation environments using Zebu and/or Palladium platforms.
- Convert and integrate RTL designs into the emulation platform, ensuring smooth bring-up.
- Develop and optimize emulation testbenches for SoC-level verification.
- Debug emulation runs, identify performance bottlenecks, and resolve hardware/software interface issues.
- Collaborate with the pre-silicon verification team to map UVM/SystemVerilog testbenches to emulation.
- Analyze and report functional coverage and performance metrics from emulation runs.
- Maintain documentation of emulation flow, test plans, and debug procedures.
Required Skills and Experience:.
- Strong expertise in emulation platforms Synopsys ZeBu, Cadence Palladium (experience with both is a plus).
- Proficiency in SystemVerilog, UVM, and RTL (Verilog/VHDL).
- Hands-on experience in hardware/software co-verification and pre-silicon validation.
- Experience with waveform debugging tools, compilation flows, and hardware mapping.
- Familiarity with SoC subsystems — ARM-based architecture, buses (AHB/AXI/APB), and peripherals.
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