Senior Digital Verification Engineer

Senior Design Verification EngineerLocation: Bangalore.Experience: 4 to 10 Years.Notice Period: Any.Perform verification of complex digital designs at block and system level.Develop testbenches using SystemVerilog/UVM for simulation and debugging.Create and execute comprehensive test plans for functional verification.Achieve coverage targets using code and...

Hi All,ACL Digital is hiring #Senior #Design #Verification Engineer!Experience: 4 Years Location: Bangalore / HyderabadNotice Period: Immediate to 30 Days Preferred!We're seeking experienced professionals ASIC/SoC verification. If you have expertise in UVM/System Verilog, proficiency in scripting languages like Python/Perl/TCL, and a strong grasp of...

JD:This role requires expertise in PCIe, CPU, Ethernet, CXL, DDR, and RISC-V technologies.Key Responsibilities:Develop and execute verification plans for hardware designs incorporating PCIe, Ethernet, CXL, DDR, and RISC-V technologies.Design and implement verification environments using SystemVerilog and UVM methodologies.Develop test cases to validate...

Hi All,ACL Digital is hiring Design Verification Engineers Experience: 8+ yearsLocation: Hyderabad / BangaloreJoin: ImmediateKey Skills: 8+ Years in IP/Sub-System/SoC DV Testbench Development Strong in SV UVM, Functional & Formal Verification Hands-on with RISC-V / CPU / PCIe / DDR / Ethernet SoC Integration, Debugging & Coverage Closure Expertise in...

Senior Design Verification EngineerJob Description:SV / UVM Test bench development and test cases coding.Code and Functional coverage analysis and closure.Work with team for verification closure.Experience with python or any other scripting language is a plus.Bus protocols AXI / APB / UART/ IJTAG protocol working knowledge is an advantage.Experience: 3 to 8...

We are looking for a motivated candidate to work with our Design Verification team. The role involves working on real number modeling and verification of mixed-signal designs using System Verilog and UVM methodologies. This is a hands-on opportunity to gain experience in advanced verification flows and contribute to real-world projects.Exp: 3+ YearsLocation:...

SOC RTL Design VerificationExperience: 4 to 10 YearsLocation: BangaloreKey Responsibilities:• Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification• Development and verification of post-si validation sequences using C/C++• Create methodology-based (UVM)...

Lead Functional Verification EngineerExperience: 6+ YearsLocation: BangaloreJob Description:Lead verification activities for complex CPU cores, memory subsystems, and high-speed PCIe IPs.Define verification strategy, test plan, and coverage goals based on architecture and spec reviews.Build and maintain advanced UVM-based testbenches for block and...

NoC Verification EngineerExperience: 7 to 14 YearsKey Responsibilities:Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics.Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.Integrate and verify IPs like AXI4, CHI-B/C/E, PCIe, and...

Job Title:Functional Verification EngineerLocation:BangaloreExperience:4+ YearsJob Type:Full-timeIndustry:Semiconductor / VLSI / ASIC DesignEducation:B.E./B.Tech or M.E./M.Tech in ECE/EEE/Computer EngineeringJob Description:We are seeking a skilled and detail-orientedFunctional Verification Engineerto be part of our IP/SoC verification team. The candidate...