Design verification Engineer
5 hours ago
Job Title: Design Verification Engineer
Location:
Pune / Bangalore
Experience:
5+ Years
Role Overview:
We are seeking an experienced
Design Verification Engineer
with a strong background in
MAC, Bluetooth, Wi-Fi
, and
SystemVerilog
to join our team. The ideal candidate should have proven expertise in verification methodologies and hands-on experience in wireless communication technologies.
Key Responsibilities:
- Develop and execute comprehensive verification test plans for complex SoC/IP blocks.
- Perform
functional and system-level verification
using
SystemVerilog
and industry-standard verification methodologies (UVM/OVM). - Work on
MAC layer, Bluetooth, and Wi-Fi verification
with at least
1+ year of hands-on experience
in these domains. - Create testbenches, implement coverage-driven verification strategies, and ensure functional completeness.
- Debug design and verification issues by collaborating closely with design and architecture teams.
- Optimize verification environments and regression suites to improve efficiency.
- Document verification strategies, results, and provide regular status updates.
Required Skills & Qualifications:
- 5+ years of experience
in ASIC/SoC/IP verification. - Strong expertise in
SystemVerilog
and UVM/OVM methodologies. - Proven experience with
MAC layer, Bluetooth, and Wi-Fi verification (minimum 1 year)
. - Good understanding of wireless communication standards and protocols.
- Solid debugging skills using simulators, waveform viewers, and coverage tools.
- Strong problem-solving, analytical, and communication skills.
- Ability to work independently as well as in cross-functional teams.
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