
Physical Verification Engineer
7 days ago
"Empowering a smarter, connected future, Astrasilica innovates and transforms technology. As an Astrasilica Hardware Engineer, you'll shape the future by designing, optimizing, and testing cutting-edge electronic systems, collaborating with cross-functional teams to drive innovation and excellence."Physical Verification EngineerCriteria:
- Minimum of 3-6 years of experience in IC design.
- Notice Period : 0
- 45 days.
Responsibilities:
- Manage physical verification (PV) checks, issue fixing, and sign-off processes.
Conduct and analyze PV checks, including DRC, ERC, LVS, DFM, Antenna and PERC.
- Plan for and address electrical considerations (EM, IR drop, Noise) during ECO phase.
- Execute PV activities at the Hard Macro/Partiiton level.
- Collaborate closely with the Physical Design (PD) team to resolve PV issues and provide solutions.
Required Skills:
- Strong understanding of the PV flow and experience in debugging related issues.
- Proficiency in Innovus/FC Tools for DRC fixing and Calibre/ICV for PV Signoff.
- Knowledge of Python, PERL, and TCL for scripting and automation.
- Proven ability to achieve DRC sign-off based on
Place and Route (PNR) markers.
- Experience in physical verification and hard macro/core finishing activities.
- Excellent problem-solving and analytical skills.
- Strong communication and teamwork skills.
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