Signal Integrity Architect

Company:Qualcomm India Private LimitedJob Area:Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.Minimum Qualifications:• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.Position: Signal Integrity ArchitectWe are seeking an experienced Signal Integrity Architect (individual contributor) to develop high-performance signal integrity (SI) solutions tailored for advanced server applications. In this role, you will work closely with the platform team and collaborate with cross-functional teams, including software, firmware, packaging, product management, and component suppliers. You will lead the definition, analysis, and verification of SI for high-speed interconnects across die, interposer, package, PCB, and system levels for data center servers.Key ResponsibilitiesCollaborate with SoC, applications engineering, packaging, and system design teams to define and implement system interconnects that meet the unique demands of high-end server environments.Provide guidelines and feedback on silicon timing, bump/RDL, package pinout and PCB specifications.Develop customer guidelines and define module interfaces/formats for simulation.Lead the creation of server-grade SI models, simulations, and final designs.Perform early SI analysis on 2.5D/3D structures and establish design guidelines.Update and automate design and analysis flows.Prepare and present technical documentation and reports to stakeholders, including engineering teams, senior management, customers, and suppliers.Minimum QualificationsMaster's degree in Electrical or Computer Engineering, with a specialization in Signal Integrity (SI).6+ years of experience in SI analysis, simulation, and measurement of high-speed digital systems.Strong knowledge of SI fundamentals, including power distribution networks (PDN), EMIR, transmission line theory, crosstalk, S-parameters, and channel simulations.Expertise in DDR5/LPDDR5X JEDEC specifications and/or SerDes standards (PCIe, CXL, USB, Ethernet, etc.).Experience in developing SI methodologies from die to system, with lab correlation and validation.Proficiency with 2D/2.5D/3D EM simulation tools such as ANSYS HFSS Cadence Sigrity, Dassault Systèmes CST, Keysight ADS, and Synopsys' HSPICE.Hands-on experience creating complex SI models and performing both frequency and time-domain simulations.Proficiency in Unix/Linux environments and experience with EDA tools through scripting.Strong knowledge of packaging and PCB technologies, design, and manufacturing processes.Familiarity with 2.5D/3D packaging technologies, such as CoWoS, InFo, EMIB, and RDL.Hands-on experience with electrical validation and compliance testing using tools like VNAs, oscilloscopes, spectrum analyzers, PCIe/I2C analyzers, traffic generators, TDR, and differential probes.Proven ability to work independently and collaboratively within a cross-functional team environment.Strong technical documentation skills and excellent written and verbal communication.Preferred QualificationsPh.D. in Electrical or Computer Engineering, specializing in SI.10+ years of experience in SI analysis, simulation, and measurement of high-speed digital systems.In-depth understanding of computational electromagnetics and transmission line theory.Proficiency in DDR5 and LPDDR5X timing budgets, jitter analysis, and PHY design/link analysis.Experience with SI simulation for PCIe Gen6+, multi-gigabit serial buses (112Gbps+), UCIE, etc.Experience with package and PCB design tools such as Cadence Allegro.Proficiency in scripting with MATLAB, Perl, and Python. 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