Senior Design Verification Engineer
5 days ago
Company Description
Scaledge Technology is a rapidly growing product engineering services company specializing in Semiconductor Chip Design & Verification, Processors, System Design, and Embedded Software Development. With our experienced team and deep knowledge, we ensure exceptional results for every project. Our clients, some of the world's most innovative companies, trust us to provide extraordinary solutions for their electronic products in domains like Storage, RISC-V, AI/ML, Automotive, Consumer, Networking, and IoT. We prioritize client satisfaction by delivering tailored solutions that consistently exceed expectations.
Job Title: Lead SoC Verification Engineer
Location:
Bengaluru
,
Pune , Hyderabad
,
Ahmedabad
Experience: 6+ Years
Employment Type: Full-Time
About the Role
We are seeking a highly skilled and motivated Lead SoC Verification Engineer
to join our cutting-edge semiconductor team. This role is ideal for someone with deep expertise in
PCIe, DDR, Ethernet, NoC architectures
, and a strong command of
SystemVerilog and UVM methodologies
. You will lead verification efforts for complex SoC designs, drive testbench architecture, and mentor junior engineers in a fast-paced, innovation-driven environment.
Key Responsibilities
- Lead the
verification strategy and execution
for high-performance SoC blocks and subsystems. - Architect and develop
UVM-based testbenches
for protocols like PCIe, DDR, Ethernet, and NoC. - Collaborate with design, architecture, and firmware teams to define verification plans and corner cases.
- Drive
coverage analysis
, regression testing, and bug tracking to ensure first-pass silicon success. - Perform
assertion-based verification
and integrate formal techniques where applicable. - Review and optimize simulation performance and testbench efficiency.
- Provide technical leadership and mentorship to junior verification engineers.
Required Skills & Qualifications
- 6+ years
of hands-on experience in SoC verification. - Strong expertise in
SystemVerilog
,
UVM
, and simulation tools (e.g., VCS, Questa, Incisive). - Proven experience verifying
PCIe, DDR, Ethernet
, and
NoC
protocols. - Solid understanding of
SoC architecture
, bus protocols, and memory subsystems. - Experience with
coverage-driven verification
, assertions, and debugging complex issues. - Familiarity with scripting languages (Python, Perl, Shell) for automation.
- Excellent communication, documentation, and leadership skills.
Preferred Qualifications
- Experience with
formal verification
tools and methodologies. - Exposure to
emulation platforms
and post-silicon validation. - Prior experience in
leading verification teams
or projects.
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