Lead Design Verification Engineer
1 day ago
About Us – Excel VLSI
Excel VLSI
Technologies is a leading provider of advanced semiconductor solutions, specializing in both digital and analog chip design alongside embedded software development. Founded and headquartered in Bangalore, India, we have rapidly established ourselves as a trusted partner to global semiconductor leaders, focusing on VLSI/ASIC design services and talent development.
Our team is driven by innovation and a commitment to technical excellence, led by industry veterans with over two decades of experience across organizations. Excel VLSI cultivates a collaborative culture that enables talented engineers to thrive, contribute, and drive the success of high-impact projects.
Our mission is to empower innovative minds and leverage deep expertise to deliver top-tier design, verification, and physical design services to the semiconductor industry. As we continue to grow, our focus remains on providing exceptional value to our clients, nurturing technical talent, and advancing the technology landscape through quality and integrity.
Job Description:
Seniore Lead / Lead Design Verification Engineer
Experience: 7–15 years
Location: Bangalore
Work Mode: WFO / Hybrid / Remote
Employment Type: Full-Time
Job Overview:
We are seeking Lead Design Verification Engineer to contribute to the development and verification of advanced IP and SoC designs. The ideal candidate should have a strong foundation in System Verilog UVM, experience with C/C++-based verification, and working knowledge of high-speed protocols like PCIe, USB, Ethernet, or DDR.
Key Responsibilities:
- Develop and maintain UVM-based and C/C++ testbenches for IP and SoC verification.
- Collaborate with RTL and architecture teams to define verification strategies and test plans.
- Create, execute, and debug test cases targeting high-speed protocol blocks.
- Perform functional coverage analysis and assist in coverage closure.
- Debug RTL and simulation issues independently and with team support.
- Participate in code reviews, test reviews, and verification sign-off processes.
Requirements:
- 6+ years of hands-on experience in functional verification (IP or SoC level).
- Proficiency in System Verilog UVM methodology.
- Strong skills in C/C++ for testbench or embedded-level verification.
- Exposure to at least one high-speed protocol: PCIe, USB 3.0, Ethernet, DDR, etc.
- Experience with industry-standard simulators (VCS, Questa, XSIM, etc.).
- Familiar with scripting (Python, Perl, or Tcl) for automation.
Preferred:
- Experience with System C/TLM or virtual platforms.
- Familiarity with firmware or embedded driver testing.
- Exposure to formal verification or assertion-based verification (SVA).
At EXCEL VLSI, we are dedicated to cultivating a workplace that champions diversity and inclusion. We recognize that bringing together people with varied backgrounds and perspectives sparks innovation and drives our collective success. We strive to uphold fairness and eliminate any biases or barriers that could impede professional or personal advancement for our employees.
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