
Design and verification engineer
2 weeks ago
Job Description DV Positions:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
Develop functional tests based on verification test plan
Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
Debug, root-cause and resolve functional failures in the design, partnering with the Design team Qualifications and Skills for DV Positions:Bachelor's or Masters degree in Computer Science, Electronics Engineering or equivalent practical experience5+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification5+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
Experience in development of UVM based verification environments from scratch
Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
Experience with verification of ARM/RISC-V based CPU sub-systems or SoCsExperience with IP or integration verification along with expertise of protocols like AMBA, PCIe, DDR, USB, EthernetExperience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments
Experience with revision control systems like Mercurial(Hg), Git or SVN
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Verification Lead Design Engineer
4 weeks ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. 5+ years of Design Verification experience with SV/UVM Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. Design Verification experience verifying complex designs...
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Verification Lead Design Engineer
2 weeks ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
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Verification Lead Design Engineer
2 weeks ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
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Senior SOC Design Verification Engineer
2 weeks ago
Bengaluru, Karnataka, India Eximietas Design Full time ₹ 15,00,000 - ₹ 20,00,000 per yearHi All,Greetings' fromEximietas Design....We are HiringSenior SOC Design Verification Engineer.Experience:8+ years.Location:Bengaluru or Hyderabad or Visakhapatnam.Job Description:We are seeking an experienced and highly skilledSenior SOC Design Verification Engineerwith a strong background inPCIE (Peripheral Component Interconnect Express)to join our team....
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Senior Design Verification Lead
4 weeks ago
Bengaluru, Karnataka, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification (PCIE) Leads / ManagersExperience: 10+ Years.Job Description:# Lead SoC Design Verification efforts for complex projects, ensuringsuccessful execution of verification plans.# Develop and implement comprehensive verification strategies, includingtest plans, testbenches, and coverage analysis, for both...
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Senior Design Verification Lead
4 weeks ago
Bengaluru, Karnataka, India Eximietas Design Full timeEximietas Design Hiring Senior Design Verification (PCIE) Leads / ManagersExperience: 10+ Years.Job Description:# Lead SoC Design Verification efforts for complex projects, ensuringsuccessful execution of verification plans.# Develop and implement comprehensive verification strategies, includingtest plans, testbenches, and coverage analysis, for both...
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Sr verification principal design engineer
1 week ago
Bengaluru, Karnataka, India Cadence System Design And Analysis Full timePosition Description:Design Verification role for IP development team.B. Tech/M. Tech with 10+ years of relevant experience.Position is based in Bangalore/Noida, part of Cadence IP Group.Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3 C)UVM testbench development to build a...
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Verification Engineer
6 days ago
Bengaluru, Karnataka, India Angel And Genie Full timePositions: IP/ So C Verification Engineer / Senior Verification Engineer Location: Bangalore Experience: 4 - 8 Years Employment type: Full Time, permanent Salary: 32 Lakhs PAKey Responsibilities Understand the design/arch requirements and create/modify test plan Create test suites (SV/UVM, C, etc, as needed) and test benches Collaborate closely with the...
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Sr Verification Principal Design Engineer
1 week ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timePosition Description:Design Verification role for IP development team.B. Tech/M.Tech with 10+ years of relevant experience.Position is based in Bangalore/Noida, part of Cadence IP Group.Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C)UVM testbench development to build a...
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Sr Verification Principal Design Engineer
1 week ago
Bengaluru, Karnataka, India Cadence System Design and Analysis Full timePosition Description: Design Verification role for IP development team. B. Tech/M.Tech with 10+ years of relevant experience. Position is based in Bangalore/Noida, part of Cadence IP Group. Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C) UVM testbench development to...