Senior Engineer

6 days ago

Dholera Gujarat, India Tata Electronics Full time ₹ 6,00,000 - ₹ 18,00,000 per year

Job Description:

  • Understand design layout and processes of mask development.
  • Develop and maintain OPC code (recipe) for various tech nodes.
  • Develop Design Rule Checks through automated verification processes.
  • Innovate new approaches for design layout and data process verifications.
  • Ability to work in a dynamic collaborative environment which requires strong teaming skills with Engineers, Technicians, Managers, and IT
  • Interact with other Teams such as Fab Litho, CAD and Fab Integration Engineers to provide feedback to Release for D2M Reviews Disposition
  • Familiarity with Fab processing is must.
  • Work towards methodologies and processes for improvement of development and qualification flows for Tapeout working with stakeholder teams.

Qualifications:

  • Bachelor's Degree / master's degree in electrical engineering, Electronics, Chemical, Materials Science, device physics.
  • Knowledge in layout design and verification.
  • Exposure to Mentor graphics/ Synopsis EDA tools and/or SVRF language.
  • Familiarity with PERL or TCL or python or shell.
  • Minimum 3+ years of wafer fab foundry experience.
  • Excellent communication, collaboration, and interpersonal skills.
  • Demonstrated ability to manage multiple priorities effectively and meet deadlines.

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