IP/RTL Design Lead

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences – from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

MTS SILICON DESIGN ENGINEER  

THE ROLE: 

The focus of this role is to have a person with significant interest in IP / NOC Architecture and design. You can drive and collaborate with a team of higly qualified IP designers to build and deliver the next gen data fabric to multiple business units. You will work on micro-architecture , design documentation, RTL , while interacting closely with verification to ensure design quality.

THE PERSON:  

You have a passion for modern, complex processor architecture, digital design as well as design quality. You are a team player who has excellent communication skills, strong analytical & problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES: 

Digital design implementation and micro-architecture of components of the Infinity Data Fabric

Micro-architecture and RTL coding in Verilog/SystemVerilog of Data fabric components and its features as the fabric scales for server, data centre application systems.

Responsible for the inter IP integration issues resolution.

Design flow quality checks - Lint, CDC, RDC and others.

Timing closure - timing constraints, synthesis, logic-depth reduction.

Design area optimizations.

Low power design techniques, UPF included

PREFERRED EXPERIENCE: 

6 to 10  years of working experience in ASIC design.

Proficiency in Verilog/SystemVerilog RTL.

Experience in full IP design cycle, requirements definition, architecture and microarchitecture specification.

Highly motivated to seek out solutions and willing to learn new skills to fulfill job requirements;

Active knowledge of ASIC design quality flows.

Communication bus protocols - CHI , AXI or similar

Design tools including Spyglass, Questa CDC, Conformal, VCS, Verdi, DVE

Front-end design of multi-clock / multi-reset domain blocks

Low power analysis and design

Shell/Tcl/Perl/Python scripting skills

Version control systems such as Perforce, ICManage

ACADEMIC CREDENTIALS:  

• Bachelors or Masters degree in computer engineering/Electrical Engineering 
• #LI-BM2

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.