
Senior Verification Engineer
1 week ago
We're Hiring – Verification Engineer
Job Description
We are seeking a highly skilled Verification Engineer to join a leading international semiconductor team . You will be responsible for verification at the block, subsystem, and top levels, ensuring functionality, performance, and quality of advanced chip designs.
Key Responsibilities:
- Develop and execute verification plans using SystemVerilog and UVM
- Perform block-level, subsystem, and top-level verification
- Work with formal and dynamic verification methods
- Drive regression testing and automation using scripting languages
- Collaborate closely with design teams to resolve complex verification challenges
- Utilize version control and industry-standard verification methodologies
Requirements:
- Master's or PhD in Electronics, Computer Science, or related field
- 8+ years of industrial experience in verification
- Proficiency in SystemVerilog and UVM
- Strong knowledge of simulation methodologies and tools
- Hands-on experience with scripting languages (Python, Perl, Bash, TCL)
- Familiarity with regression tools and version control systems (git, svn)
- Proven experience in formal and dynamic verification
- Strong problem-solving abilities and attention to detail
- Excellent teamwork and communication skills
Why Join?
This is a unique opportunity to work on cutting-edge semiconductor projects.
Apply today and advance your career in semiconductor verification
Send your resume to
Hiring #VerificationEngineer #BangaloreJobs #SystemVerilog #UVM #EDA #Semiconductor #EngineeringCareers #IndianEngineers #MumbaiJobs-
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