Physical Design Leader

21 hours ago

Bengaluru, Karnataka, India Baya Systems Full time ₹ 15,00,000 - ₹ 30,00,000 per year

Company Description

Baya Systems is revolutionizing semiconductor design with its innovative chiplet-based, high-performance modular systems. The company specializes in state-of-the-art on-chip fabric and communication technologies that ensure seamless interoperability across diverse industry-standard protocols. This approach optimizes key factors like performance, yield, reusability, and cost-efficiency. Inspired by the Baya bird, known for its mastery in creating cohesive nests, Baya Systems brings together the best solutions with efficiency and integration. Backed by Matrix Partners and Intel Capital, Baya Systems is shaping the future of intelligent compute systems.

Role Description

This is a full-time, on-site role based in Bengaluru for a Physical Design Leader. The Physical Design Leader will be responsible for tasks including floor planning, clock tree synthesis, place-and-route, and timing closure activities for advanced technology nodes. They will manage cross-functional collaboration with RTL designers, verification teams, and DFT engineers to drive successful tape-outs. Additional responsibilities include quality checks, managing power optimization, and overseeing the physical implementation of complex IC designs from synthesis through GDSII. This role requires a high degree of precision and leadership in a dynamic engineering environment.

Qualifications

  • Expertise in Physical Design tasks such as floor planning, place-and-route (P&R), and static timing analysis (STA).
  • Experience with EDA tools like Synopsys ICC2, Cadence Innovus, or Mentor Calibre for physical implementation and verification.
  • Strong understanding of timing closure, clock tree synthesis (CTS), and low-power design methodologies (e.g., Dynamic Voltage Scaling and Multi-Voltage domains).
  • Proficiency in scripting languages (e.g., TCL, Perl, Python) to automate design workflows and optimize processes.
  • Familiarity with chip assembly, power integrity (IR drop and EM analysis), and thermal optimization.
  • Demonstrated leadership skills in managing cross-functional teams, timelines, and deliverables in high-pressure environments.
  • Bachelor's, Master's, or Doctorate degree in Electronics, Electrical Engineering, or a related field
  • Experience in advanced process nodes such as 5nm, 7nm, or below is highly desirable.

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