STA Enginee

Job Description: STA Engineer

Location: Bengaluru & Noida

Experience: 3+ years

Notice Period: Immediate to 15 days

About the Role:

We are looking for a skilled STA (Static Timing Analysis) Engineer to join our dynamic engineering team. The ideal candidate should have strong expertise in timing analysis, sign-off methodologies, and the ability to work closely with cross-functional teams to ensure robust and high-performance chip designs.

Key Responsibilities:

Perform Static Timing Analysis (STA) using industry-standard tools (PrimeTime/Tempus).

Drive timing closure for multiple blocks and top-level designs.

Develop and validate timing constraints (SDC) for various design stages.

Analyze timing violations and work closely with physical design, synthesis, and RTL teams to resolve issues.

Conduct timing sign-off and ensure design meets all timing requirements and specifications.

Work on ECO flow and deliver clean timing reports for final tape-out.

Collaborate with cross-functional teams to ensure high-quality deliverables within deadlines.

Required Skills & Experience:

Minimum 3+ years of hands-on experience in STA.

Strong understanding of timing concepts, clocking methodologies, and digital design fundamentals.

Proficiency with STA tools such as Synopsys PrimeTime, Cadence Tempus, or equivalent.

Experience with SDC constraints, multi-corner multi-mode (MCMM) analysis & sign-off flows.

Good understanding of physical design, synthesis flows, and ECO methodologies.

Strong analytical and problem-solving skills.

Excellent communication and teamwork abilities.

Preferred Skills:

Knowledge of scripting languages like Tcl, Perl, or Python for automation.

Exposure to advanced technology nodes (7nm, 5nm, etc.).

How to Apply:

If this role matches your experience and career goals, please share your updated CV