Verification Engineer
2 weeks ago
Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems.
At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities
Develop, implement, and maintain verification environments using Verilog/SystemVerilog.
Apply UVM methodology to build and enhance testbenches, ensuring thorough coverage of verification scenarios.
Perform debugging and root-cause analysis of test failures to ensure design quality.
Verify and validate AMBA protocols (AXI, AHB, APB) where applicable.
Collaborate on ARM-based SoC verification tasks (preferred, but not mandatory).
Leverage strong knowledge of digital design fundamentals to identify design and verification gaps.
Create and maintain automation scripts (Perl, Tcl, Make, Shell scripting) to improve verification efficiency.
Work closely with design, validation, and architecture teams to ensure timely closure of verification tasks. Skills Must have
8+yrs exp
Strong verification skills with hands-on experience in Verilog and SystemVerilog.
Proven expertise in UVM methodology, with solid experience in developing testbenches.
Good debugging and problem-solving skills.
Familiarity with AMBA protocols (AXI, AHB, APB)
good to have.
Strong foundation in digital design fundamentals.
Proficiency in scripting languages (Perl, Tcl, Make, Shell scripting) for automation. Nice to have
Exposure to ARM-based SoCs preferred but not mandatory.
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