SoC Physical Design Engineer
22 hours ago
You will work on physical design implementation of Optical Network ASICs and will be learning latest technology nodes and developing flow , doing implementation to achieve best in class ASICs , which are optimized for power, performance and area metrics.
Responsibilities- Perform physical implementation steps including floor planning, place and route, power/clock distribution, physical verification and timing closure at block level as well as full chip
- Work with logic designers & Hardware team to drive feasibility studies and explore design trade-off for physical design closure
- Perform technical evaluations of IP vendors, process nodes and provide recommendations
- Develop physical design methodologies and automation scripts for various implementation steps from Synthesis to GDSII
- Perform static timing analysis, create timing constraints and validation, critical path analysis, timing closure and timing sign-off
- 7+ years of experience in ASIC physical design flow and methodologies in 3/5 and 7nm process nodes
- Has solid knowledge of full design cycle from RTL to GDSII and understanding of underlaying concepts of IC design, implementation flows and methodologies for deep submicron design
- Experience with EDA Place & Route tools like Fusion Compiler or Innovus or similar tools and Timing tools like Primetime or similar
- Scripting experience in TCL, python or Perl
- Candidates must have a bachelor's degree or higher in Electrical/Electronics and Communication/VLSI/Microelectronics with very good academics
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Soc Physical design Lead
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Bengaluru, Karnataka, India, Karnataka Eximietas Design Full timeHi All,Greetings' from Eximietas Design.!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads..!Experience: 8+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled ASIC SOC...
