SOC Micro-architect

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.

You will need to work with cross functional teams and will be responsible for defining Micro-architecture specifications for the Structured ASIC solutions. You will also work closely with IP and platform implementation teams on the creation of Soft IP blocks, solutions and customer designs to enable those capabilities.

**Qualifications**

Primary Job Responsibilities
- Responsible for SoC Frontend Architecture and Design. Define micro-architecture specifications.
- Perform feasibility study on different third-party IP and integrate IP at the SOC level.
- Closely work with Verification team and help define testplan, run tests and debug design.
- Lead the performance model definition and development.
- Participate in design reviews of hardware and related software systems.
- Run Lint, CDC, Synthesis, STA and formal verification tools, work closely with Backend team on floorplan, Constraints definition and timing analysis.
- Participate and drive timing convergence for high speed designs including micro-architecture optimizations
- Collaborate with internal and external team members on architectural decisions, development flows and methodologies.

**Required Skills**:

- Experience with IA or CPU based SoC designs processor based SoC architectures.
- Experience with NoC design and integration with interconnect protocols, such as AXI, ACE, APB, etc.
- Expertise in Ethernet, PCIe, TSN will be a plus.
- Expert RTL developer using ASIC development techniques and designs flows at modern technology nodes including synthesis and timing closure.
- Strong knowledge of digital design involving multiple clock domains and clock power management.
- Knowledge of low power design, tools and methodologies. Power intent UPF specifications knowledge a plus.
- Excellent communication and documentation skill. Must be able to influence in heavily matrixed environment.
- Ability to operate in ambiguity where roles may not be clearly defined or teams across multiple/functions and IP/SOC must be pulled together.

Education and Experience
- A minimum of 12+ years of work experience in SOC/ASIC Front-End design
- Bachelor or Master's degree in Computer or Electrical Engineering

**Inside this Business Group**
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

**Posting Statement**
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

**Benefits**

**Working Model**
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
**In certain circumstances the work model may change to accommodate business needs.