Graduate Intern
9 hours ago
Graduate engineers will drive rapid continuous improvements in safety, quality, yield, reliability, cost, process stability/capability, output, and productivity while maintaining rigorous Copy Exactly CE and best tool matching within the Intel 300mm factory network. Need a strong technical background and capabilities to sustain, ramp, and transfer technologies using state of the art equipment and materials in one or several of the following areas: Thin Films ALD, CVD, PVD, Plating), Thermal Diffusion, RTA, EPI, Planar, Yield, Implant, Lithography, Etch Wet, Dry, or Metrology. Specific responsibilities include Equipment troubleshooting and sustaining ownership of day-to-day operations Continuously improving process and equipment operational indicators quality, cycle time, capacity and cost Deliver best in class results for tool availability, defects and parametric performance; Meet tool and process matching requirements throughout startup and ramp of new technology transfer Developing solutions to problems utilizing formal education, statistical knowledge, problem solving tools, and judgment Hands-on participation with frequent factory floor presence Commitment to work shift or regular work week as needed.
**Qualifications**:
Usage of any Post-Si debug tools (e.g., logic analyzers, oscilloscopes, things like ChipScope on FPGA's, etc.) o C/C++ and Python are the most useful languages for our work. o VLSI concepts -Power Management / Reset o Familiarity with FW (embedded uC) debug ARC or Extensa LX-series uC preferred o Knowledge of ARM PM concepts (e.g., P/Q-channel) o General clocking concepts (PLL's, RO's, etc.) o Ability to debug interactions between different microcontrollers o Understanding power delivery concepts, VR interactions, etc. -Mesh / Coherency o Knowledge of coherence algorithm (MESI, MOESI, MESIF, etc.). o Experience with SoC fabrics (AXI, ACE or other AMBA protocols). o Understanding transaction flows through the system. - PCI Express (we can leverage this expertise for other IO's, like CXL). o Familiarity with any generation of the PCI Express specification o Usage of 3rd party PCIe Analyzers very helpful (Tek, Lecroy, etc.) -Memory o Expertise in any DDR technology. o Usage of 3rd party DDR Analyzers very helpful (Tek, Lecroy, etc.)
**Inside this Business Group**:
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
**Posting Statement**:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
**Benefits**:
**Working Model**:
This role will require an on-site presence.
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