R&d Engr

45283BR - INDIA - Noida **Job Description and Requirements** - Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.**R&D Engineer** - Core responsibilities would include Designing and developing the VIP, Creating Verification/Coverage plans, Creating Functional specifications, Coding sequences & test scenarios, Coverage driven verification.- **Requirements**: - B.Tech/M.Tech with 10+ years of relevant industry experience. - Hands-on experience in developing HVL based verification environments, preferably using System Verilog. - Experience in verification methodologies like UVM/OVM/VMM. - Exposure to coverage driven verification. - Exposure to complex SoC and IP level verification environments. - Experience in VIP development is highly desirable. - Experience with any one of the standard simulators like VCS/IUS/MTI. - Exposure to PCIe protocol is preferred. **Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.** **Job Category** - Engineering **Country** - India **Job Subcategory** - R&D Engineering **Hire Type** - Employee R&D Engr | Synopsys