Memory Circuit Designer
2 weeks ago
**Company**: Qualcomm India Private Limited **Job Area**: Engineering Group, Engineering Group > Hardware Engineering **General Summary**: - Job Function_ - Memory Design group at Bangalore is involved in design of all types of memory compiler like SRAM, Register files, ROM generators etc. Memory Group Bangalore closely interface with San Diego team to jointly develop memory compiler. - Responsibilities_ - Define and Improve high speed and/or low power memory architectures - Perform the bit cell evaluation and identify the read/write issues associated with it - Write vectors and perform functional verification of memory Timing/Power analysis - Physical verification and DFM, DFY analysis - Review methods appropriate to develop new circuits and select best method of achieving desired performance and functional goals - Work closely with other team member - Requires effective communication between multiple sites and ability to work with multiple groups. - Involve in determining design methodology & Design individual circuit blocks related to memory **Minimum Qualifications**: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. - Skills & Experience_ - Master/Bachelor in electronics - Working experience (10+years) in preferably Memory design - Compiler approach of developing embedded SRAM/ROM development - Fundamental know how on bit cell and its characteristics (SNM, WM, Cell current, Standby current, data retention) - Fundamentals of process variability and its effect on memory design - Strong understanding of Digital/Memory circuit design/layouts - Critical path modeling concept, various type of models ( RC, C, Pai, ladder, distributive, etc) - Good knowledge of semiconductor physics in general. Knowledge of and affinity to IC technology and IP design is mandatory Qualcomm is an equal opportunity employer and supports workforce diversity. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. If you would like more information about this role, please contact Qualcomm Careers.
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Memory Layout Engineer
2 weeks ago
Noida, India ACL Digital Full timeExperience : 3 to 8 yearsLocation : Hyderabad/NoidaRole and Responsibilities:Responsible for Memory Compiler layout development and verification.·Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.·Perform layout verification like LVS/ DRC/ Latchup,...
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Memory Layout Engineer
1 week ago
Noida, India ACL Digital Full timeExperience : 3 to 8 yearsLocation : Hyderabad/NoidaRole and Responsibilities: Responsible for Memory Compiler layout development and verification.·Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.·Perform layout verification like LVS/ DRC/ Latchup,...
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Memory Layout Engineer
2 weeks ago
Noida, India ACL Digital Full timeExperience : 3 to 8 years Location : Hyderabad/Noida Role and Responsibilities: Responsible for Memory Compiler layout development and verification.· Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.· Perform layout verification like LVS/ DRC/ Latchup,...
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Memory Layout Engineer
2 weeks ago
Noida, India ACL Digital Full timeExperience : 3 to 8 years Location : Hyderabad/Noida Role and Responsibilities: Responsible for Memory Compiler layout development and verification.· Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.· Perform layout verification like LVS/ DRC/ Latchup,...
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Memory Layout Engineer
2 weeks ago
Noida, India ACL Digital Full time- Experience : 3 to 8 years- Location : Hyderabad/NoidaRole and Responsibilities:- Responsible for Memory Compiler layout development and verification.·- Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.·- Perform layout verification like LVS/ DRC/...
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Memory Layout Engineer
10 hours ago
Noida, India ACL Digital Full time- Experience : 3 to 8 years - Location : Hyderabad/Noida Role and Responsibilities: - Responsible for Memory Compiler layout development and verification.· - Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.· - Perform layout verification like LVS/ DRC/...
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Memory Layout Engineer
4 weeks ago
Noida, India ACL Digital Full timeExperience : 3 to 8 yearsLocation : Hyderabad/NoidaRole and Responsibilities:Responsible for Memory Compiler layout development and verification.·Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.·Perform layout verification like LVS/ DRC/ Latchup,...
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Memory Layout Engineer
3 weeks ago
Noida, India ACL Digital Full timeExperience : 3 to 8 yearsLocation : Hyderabad/NoidaRole and Responsibilities: Responsible for Memory Compiler layout development and verification.·Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.·Perform layout verification like LVS/ DRC/ Latchup,...
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Memory Layout Engineer
2 weeks ago
Noida, Uttar Pradesh, India, Ghaziabad ACL Digital Full timeExperience : 3 to 8 yearsLocation : Hyderabad/NoidaRole and Responsibilities: Responsible for Memory Compiler layout development and verification.·Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier, pre-charge, Control blocks for SRAM.·Perform layout verification like LVS/ DRC/ Latchup,...
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A&ms Circuit Design Engr, Ii
2 weeks ago
Noida, India Synopsys Full time48526BR - INDIA - Noida **Job Description and Requirements** - We're looking for Analog Design Engineer - Does this sound like a good role for you? - You will be part of a strong development team in the area of GPIOs, Speciality IOs and General Purpose Analog IPs. You will develop Analog Full Custom IPs such as: GPIOs, I2C, I3C, SMBUS, eMMC, SVID, Quad SPI,...