
V&v Design
4 days ago
Programming: C, C++, ADA, Scripting languages (Python,..)
RT OS -Linux, VX Works, QNX
Protocols - TCP/IP, CAN
Standards: CENELEC SIL4 / DO178A / DO178B
**Accountability**
Take part to major deployment projects by organizing and performing the verification, integration and test activities of a Signaling project that adapts a generic Alstom solution, fitting the client’s needs in terms of Quality, Cost and Delivery.
Define, manage, and execute all project activities related with Verification, Integration and Testing. Cooperate tightly with Test & Commissioning to complement in-house with on-site testing activities.
Share with Project Engineering Manager and Project Safety Assurance Manager the V&V strategy defined to deliver a validated solution and agree on requested budget and schedule of inputs and deliverables.
VVM: + lead project V&V team
**Main Task**:
Define the Project Verification and Validation strategy in the V&V Plan, to ensure proper coverage and demonstration that customer and design requirements are met. Collect the contributions of all involved stakeholders (e.g. Test & Commissioning)
Optimize allocation of tests in-house and on-site, favoring labs to anticipate results and increase efficiency and coverage
Define and agree V&V activity schedule
Define the project Requirement Validation Table (RVT) to demonstrate the validation of technical requirements
Manage full verification and validation of all configured functions, together with parameters and data produced on the project
Define needs, architecture and follow-up implementation of testbenches and analysis tools
Ensure independence of verification from design
Cooperate with Test and Commissioning for the definition and follow-up of Site Acceptance Tests
**Education Type**
- Associate Degree-Electronics and Instrumentation Engineering
**Job Type**
- Full Time-Regular
**Experience Level**
- Mid Level
**Total Years of Exp**
- 6 - 9
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