
Seniors/ Leads/ Manager Design Verification Engineers
14 hours ago
We’re Hiring | Seniors/Leads/ Managers Design Verification Engineers
Are you passionate about IP, Subsystem, and SoC level verification ?
Join Mirafra Technologies and be part of an innovative journey in the Semiconductor & VLSI domain , working on cutting-edge projects with a dynamic team
Role: Seniors/Leads/ Managers Design Verification Engineer
Experience: 4+ Years
Key Skills: CPU, AMS, SOC, UPF, JTAG, PCIe, UCIe, CXL, USB, DDR, SerDes, MIPI, Ethernet, Python, Power Aware (and more)
Location: Bangalore / Hyderabad / Noida / Ahmedabad / Pune
Notice Period: Less than 45 Days
If you’re ready to take your DV career to the next level, we’d love to hear from you
Share your profile with us at
-
Senior Design Verification Engineer
15 hours ago
Bangalore, India eInfochips (An Arrow Company) Full timePOSITION TITLE: Senior Engineer/Engineer – ASIC Design Verification LOCATION: Noida/ Bangalore/ Hyderabad/ Pune/ Chennai/ Ahmedabad ROLE & RESPONSIBILITIES An expert level with developing UVM-based SV test-benches. Highly experienced with defining block, sub-system and SOC top level test plans. Relevant experience with one or more of PCIe,...
-
Senior Design Verification Engineers
15 hours ago
Bangalore, India ACL Digital Full timeSenior Design Verification Engineer: Should have PCIE IP level verification exposure Good UVM understanding Serial protocol understanding Interested,please drop your updated CV to
-
Design Verification lead
15 hours ago
Bangalore, India eInfochips (An Arrow Company) Full timeLead Verification Engineer – Work from Office Only Location: Pune / Bangalore / Ahmedabad / Noida / Chennai Experience: 8+ Years (Relevant ASIC/SoC Verification) About Us At eInfochips (An Arrow Company) , we don’t just design chips — we design possibilities. With over 500+ product designs and customers across the globe, we’re shaping...
-
Senior Design Verification Engineer
15 hours ago
Bangalore, India ACL Digital Full timeSenior Design verification Engineer Mandatory Skill : PCIE Location : Bangalore Experience : 5 years Design Verification Engineer responsible for ensuring functional correctness of ASIC/SoC designs. Key Task: Develop and execute verification plans for complex digital designs. Methodology: Use UVM/SystemVerilog to create testbenches, write...
-
Design Verification Engineer
15 hours ago
Bangalore, India ACL Digital Full timeDesign Verification Engineer - Senior / Lead / Sr. Lead Job Description: Must have good knowledge on the verification flows. Excellent hands-on debug skills and problem solving attitude.. Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC Experience of working on Functional Verification, SoC Verification,...
-
Senior Engineer, Design Verification Engineering
14 hours ago
Bangalore, India Capgemini Engineering Full timeWe are looking for more than 5years of experience. Job Description for DV You will be part of the team verifying IPs and SoCs leading to first Si success. Manage and lead a team of Verification engineers IP verification is coverage driven using latest industry standard methodologies and HVLs. Work involves defining verification strategy, writing test...
-
Senior Design Verification Engineer
15 hours ago
Bangalore, India Prodapt ASIC services (Formerly Innovative Logic) Full timeKey job responsibilities: As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test...
-
Senior Engineer, Design Verification Engineering
15 hours ago
Bangalore, India ACL Digital Full timeHi All, ACL Digital is hiring #Senior #Design #Verification Engineer! Experience: 4 Years Location: Bangalore / Hyderabad Notice Period: Immediate to 30 Days Preferred! We're seeking experienced professionals ASIC/SoC verification. If you have expertise in UVM/System Verilog, proficiency in scripting languages like Python/Perl/TCL, and a strong...
-
Design Verification Lead
15 hours ago
Bangalore, India ACL Digital Full timeHi, Greetings from ACL Digital, Looking for Lead Design Verification Engineers Exp Level:7+ Years Location : Bangalore and Hyderabad JD: 7+ Years of experience in Design verification Must have Expertise: 1. Grounds up verification environment development using SV/ UVM is a must 2. One of the high speed protocols like PCIe or USB 3 or MIPI ...
-
Senior Design Verification Engineer
15 hours ago
Bangalore, India ACL Digital Full timeSenior Design Verification Engineer Job Description: SV / UVM Test bench development and test cases coding. Code and Functional coverage analysis and closure. Work with team for verification closure. Experience with python or any other scripting language is a plus. Bus protocols AXI / APB / UART/ IJTAG protocol working knowledge is an...