Engineer - design analysis

This is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing,...

College education in Electronics Engineering or Computer Engineering Exp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...

This is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing,...

College education in Electronics Engineering or Computer Engineering Exp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...

This is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing,...

College education in Electronics Engineering or Computer Engineering Exp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...

College education in Electronics Engineering or Computer EngineeringExp- 7-12 Yrs- Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc.- Ability to debug existing Verilog/System verilog test cases with little or no help from the designer.- Functional simulation...

College education in Electronics Engineering or Computer Engineering Exp- 7-15 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...

Company: ACL Digital Company Location: Experience: 5 to 15 Years Employment Type: Full-Time ACL Digital company , is looking for talented and driven EMIR/PDN Engineers to be part of our world-class semiconductor design team in Bangalore . Perform EM/IR and power grid analysis for advanced So Cs across process nodes • Redhawk SC, Voltus, Ansys, Synopsys)...

BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...