Senior design verification engineer

3 weeks ago


Bangalore, India EInfochips Full time

Position: Senior Design Verification Engineer Experience : Min 4+ yrs industry experience in DV Job Locations : Bangalore/Hyderabad/Ahmedabad/Pune/Noida/Chennai What We Offer : A Fortune 104 Employer Brand Best In Class Employee Welfare Practices Cutting Edge, Full Chip ODC Projects Higher Education Sponsorship in Top Notch Institutes Job Description: · Must have expertise in ASIC verification methodologies and ASIC design flow · Experience working of SV and UVM methodology and knowledge of at least one industry standard protocols like Ethernet, PCIe, MIPI, USB, AXI, RISC-V, AMBA, DDR or similar is required, must have executed at-least 2 So C Verification projects · Experience in any of the listed topics: UVM, formal verification, mixed-signal simulations, power-aware simulations · Experience in setting up and debugging functional and/or gate-level simulations · Experience in translating functional requirements into verification plans · Experience in developing verification environment and regression setup. · Coverage analysis and closure



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