System-on-chip design verification engineer
5 days ago
Boltchip is a Consulting firm based in Singapore building Innovation Capability Centers (ICCS) for global clients. One of our US clients is building their products on NOC and having IPS in front end design is expanding their team in India.Position: Design Verification Engineer with SOC(The role is for verifying complex So C-level designs)Experience: 4–6 yearsLocation: Bangalore (Bellandur)Qualification: B. Tech / M. Tech in Electronics or related fieldAbout the RoleWe are seeking skilled Verification Engineers with strong experience in So C design verification. The candidates should have expertise in verifying complex So C-level designs, with exposure to industry-standard protocols and verification methodologies(UVM). He/She will be part of a dynamic team working on state-of-the-art So C projects, contributing to verification planning, test bench development, execution, and closure.Key ResponsibilitiesDevelop, implement, and maintain verification environments using System Verilog and UVM.Perform test planning, test case development, debugging, and functional coverage closure.Verify So C-level integration of IPs and subsystems.Work closely with design, architecture, and validation teams to ensure first-pass silicon success.Drive verification strategies, regression automation, and debug complex failures.Required Skills & Experience4–7 years of experience in ASIC/So C functional verification.Strong hands-on expertise with System Verilog and UVM methodology.Solid experience in So C verification including bus/protocol-level testing.Good understanding and working knowledge of standard protocols such as:AMBA (AXI/AHB/APB)UART, SPI, I2 C/I3 CMIPI, and other So C-relevant protocolsExperience in developing and debugging complex test benches.Familiarity with coverage-driven verification and constrained-random testing.Proficiency with simulation, waveform debug, and regression tools.Strong problem-solving, analytical, and communication skills.Preferred Skills (Good to Have)Exposure to low-power verification (UPF).Experience with gate-level simulations and formal verification.Knowledge of scripting (Perl/Python/Shell) for automation.Experience with verification of subsystems such as USB subsystem, UCIe, PCIe/CXL subsystem, memory controllers, interconnects, or peripheral IPs.
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Delhi, India BOLTCHIP Full timeBoltchip is a Consulting firm based in Singapore building Innovation Capability Centers (ICCS) for global clients. One of our US clients is building their products on NOC and having IPS in front end design is expanding their team in India.Position: Design Verification Engineer with SOC(The role is for verifying complex So C-level designs)Experience: 4–6...
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