Tech Mahindra | Design Verification Engineer | bangalore

Hello everyone!! Greetings from Tech Mahindra!! We are looking for Design Verification Based on PCIe Exp Preferred Qualifications: Experience in verification of PCIe/CXL based sub-system/SoC/IP. Hands on experience in PCIe protocol Minimum 5+ Years Knowledge of SoC with processor boot-flow. Verification expertise in Physical Layer, Link Layer, and...

Hi Folks,We are hiring for Design Verification EngineerExp- 5-20 yearsLocation- Bangalore/ Kochi/ Ahemdabad / VizagJDDesign verification of IP-level, SoC -level and/or block-level/sub-system-level designsExperience in developing verification plan/verification methodology/flows from scratchHands-on expertise with UMV (or similar) methodology, and...

Hi Folks,We are hiring for Design Verification EngineerExp- 5-20 yearsLocation- Bangalore/ Kochi/ Ahemdabad / VizagJDDesign verification of IP-level, SoC -level and/or block-level/sub-system-level designsExperience in developing verification plan/verification methodology/flows from scratchHands-on expertise with UMV (or similar) methodology, and...

Hello,We are seeking a skilled and experienced Design Verification Engineer to join our team. The ideal candidate will have a strong background in Design Verification and hands-on experience with industry-standard tools for Design Verification. If you are passionate about electronics and enjoy working in a dynamic and innovative environment, we would love to...

Hi FolksWe are hiring for PCIE DV EngineerExp-5+Location- Bangalore / Kochi / Ahemdabad / VizagJDExperience in verification of PCIe/CXL based sub-system/SoC/IP.Hands on experience in PCIe protocol Minimum 3+ YearsKnowledge of SoC with processor boot-flow.Verification expertise in Physical Layer, Link Layer, and Transaction Layer of PCIe/CXL...

Hi Folks We are hiring for PCIE DV Engineer Exp-5+ Location- Bangalore / Kochi / Ahemdabad / Vizag JD Experience in verification of PCIe/CXL based sub-system/SoC/IP. Hands on experience in PCIe protocol Minimum 3+ Years Knowledge of SoC with processor boot-flow. Verification expertise in Physical Layer, Link Layer, and Transaction Layer of PCIe/CXL...

Hi Folks We are hiring for PCIE DV Engineer Exp-5+ Location- Bangalore / Kochi / Ahemdabad / Vizag JD Experience in verification of PCIe/CXL based sub-system/SoC/IP. Hands on experience in PCIe protocol Minimum 3+ Years Knowledge of SoC with processor boot-flow. Verification expertise in Physical Layer, Link Layer, and Transaction Layer of PCIe/CXL...

Hello everyone!! Greetings from Tech Mahindra!! We are looking for Design Verification Based on PCIe Exp Preferred Qualifications: Experience in verification of PCIe/CXL based sub-system/So C/IP. Hands on experience in PCIe protocol Minimum 5+ Years Knowledge of So C with processor boot-flow. Verification expertise in Physical Layer, Link...

Hello everyone!!Greetings from Tech Mahindra!!We are looking for Design Verification Based on PCIe ExpPreferred Qualifications:Experience in verification of PCIe/CXL based sub-system/SoC/IP.Hands on experience in PCIe protocol Minimum 5+ YearsKnowledge of SoC with processor boot-flow.Verification expertise in Physical Layer, Link Layer, and Transaction Layer...

Hi Folks, We are hiring a Senior/ DFT Lead to spearhead our innovative DFT initiatives and drive excellence at Tech Mahindra!

Job Responsibilities: HSIO PHY Integration verification @ Sub-system and SoC level HSIO PHY IP level test case porting to SoC level HSIO PHY SoC level Test case development, Running regression in RTL/GLS & Timing simulations HSIO PHY Virtual tester simulations in RTL/GLS & Timing simulations Hands-on experience in System Verilog, OVM/UVM based constrained...

Job Responsibilities:HSIO PHY Integration verification @ Sub-system and SoC levelHSIO PHY IP level test case porting to SoC levelHSIO PHY SoC level Test case development, Running regression in RTL/GLS & Timing simulationsHSIO PHY Virtual tester simulations in RTL/GLS & Timing simulationsHands-on experience in System Verilog, OVM/UVM based constrained random...

Job Responsibilities:HSIO PHY Integration verification @ Sub-system and SoC levelHSIO PHY IP level test case porting to SoC levelHSIO PHY SoC level Test case development, Running regression in RTL/GLS & Timing simulationsHSIO PHY Virtual tester simulations in RTL/GLS & Timing simulationsHands-on experience in System Verilog, OVM/UVM based constrained random...

About the Role: We are seeking an experienced and dynamic Physical Design (PD) Lead to join our team. In this role, you will leverage your extensive expertise in physical design tools and methodologies to lead high-impact PD programs and guide large teams through the entire ASIC design flow. You will be responsible for leading end-to-end projects for one of...

About the Role: We are seeking an experienced and dynamic Physical Design (PD) Lead to join our team. In this role, you will leverage your extensive expertise in physical design tools and methodologies to lead high-impact PD programs and guide large teams through the entire ASIC design flow. You will be responsible for leading end-to-end projects for one of...

About the Role: We are seeking an experienced and dynamic Physical Design (PD) Lead to join our team. In this role, you will leverage your extensive expertise in physical design tools and methodologies to lead high-impact PD programs and guide large teams through the entire ASIC design flow. You will be responsible for leading end-to-end projects for one...

About the Role:We are seeking an experienced and dynamic Physical Design (PD) Lead to join our team. In this role, you will leverage your extensive expertise in physical design tools and methodologies to lead high-impact PD programs and guide large teams through the entire ASIC design flow. You will be responsible for leading end-to-end projects for one of...

About the Role: We are seeking an experienced and dynamic Physical Design (PD) Lead to join our team. In this role, you will leverage your extensive expertise in physical design tools and methodologies to lead high-impact PD programs and guide large teams through the entire ASIC design flow. You will be responsible for leading end-to-end projects for...

Tech Mahindra is #hiring for GCP Data Engineer . If you're an experienced professional looking for an exciting new challenge. We want to hear from you! Please apply to with your resume explaining your experience and qualifications. Location : Pan India GCP Data Engineer : U2 – up to 3 years Primary Skill : Big Querry, Data flow, Data Composer, SQL,...

Hi Folks,We are hiring for RTL EngineerExp-5+Location-Bangalore/ Kochi/ Ahmemdabad /VizagJDArchitecture DevelopmentExperience in developing High Level Architecture for a Design Requirement from Specification levelExtract Micro Architecture from High Level Architecture specificationRTL Design - Coding & IntegrationDevelop the logic design and Implement...