Analog design lead engineer

3 weeks ago

Hyderabad, India Mulya Technologies Full time

About Us We are a technology consulting company delivering best-in class Chip Design Services. Founded in 2008, we partner with top semiconductor companies in building a connected, safer tomorrow. With over 40+ tapeouts and expertise spanning the breadth of chip design, we offer a wide variety of Semiconductor skills Our embedded design services are centered around FW validation & Test Automation Chip Design Services Analog IP Design Foundation - Op Amp, Bandgap IOs - GPIO, I2 C, LVDS Clocking - PLL Power - LDO So C Design RTL Design, Integration, Lint/CDC/RDC, UPF IP/So C UVM Verification PPA, Synthesis, Constraints Management Physical Design, Timing Closure, ECOs Sign-off - Timing, Power, EM/IR, DRC/LVS/ERC PDK, Design Automation DRC/LVS/Extraction Rule deck Development PCell Development Automation Tools in Perl, Python, Go Lang Approach We support a mix of engagement models to support diverse client requirements. Engagement Models Turnkey (So W) Engagement Staff Augmentation (T&M) Offshore Design Center Key Enablers Hands on Leadership Proven Industry Experts TSMC DCA Parternship Collaboration with Academia ================ Analog Design Lead Engineer Job Description: Sevya is architecting and designing a HBM3 transceiver in an advanced Fin FET node. Sevya needs analog designers at all levels with skills in the areas of analog circuit design, custom digital design for Ser Des and other high speed IP applications, signal and power integrity modeling, pre and post silicon debugging. Familiarity with HBM, DDR and other memory standards is highly desirable but not necessary if the candidate has good knowledge of high speed design. Candidates with experience of linear circuits such as high bandwidth LDOs, amplifiers, charge pumps etc. who want to explore high speed design are also welcome, we have appropriate work and there will be opportunities to learn more. Specifically we are looking for people with approximately 3-5 yrs of experience for Senior Designer positions and 7-10 yrs for lead positions. Candidates with higher experience are also welcome for appropriate roles. Responsibilities: I/O Architecture Design: Develop and design the input/output architecture for integrated circuits using HBM technology. Signal Integrity Analysis: Perform signal integrity analysis to ensure reliable and high-speed data transfer between the HBM memory and the rest of the system. Circuit Design: Design and optimize circuits for HBM I/O interfaces, considering factors such as power consumption, area, and performance. Collaboration: Work closely with cross-functional teams, including system architects, memory designers, and layout engineers, to ensure seamless integration of HBM I/O interfaces into the overall system. Standards Compliance: Ensure that HBM I/O designs comply with industry standards and specifications, such as JEDEC standards for high-bandwidth memory. Simulation and Modeling: Utilize simulation tools and models to validate the design's performance and address any potential issues related to signal integrity, power delivery, and thermal considerations. Debugging and Troubleshooting: Identify and resolve issues during the testing and debugging phases of the design process. Documentation: Prepare detailed documentation of the HBM I/O design, including specifications, test plans, and design guidelines. Requirements: Bachelor's degree or higher in Electrical Engineering or a related field. A minimum of 3 -10 years of experience in analog circuit design within the semiconductor industry. Proven expertise in designing analog blocks, including Bandgap references, PLLs, LDOs, and High-Speed I/O circuits. Proficiency in industry-standard Electronic Design Automation (EDA) tools for analog design and simulation. Strong knowledge of semiconductor fabrication processes and technologies. Exceptional problem-solving and analytical skills. Effective communication and teamwork abilities. Preferred Qualifications: Experience in mixed-signal circuit design. Familiarity with high-speed data communication interfaces. Knowledge of low-power design techniques. Published research or patents related to analog design. Contact: Uday Mulya Technologies "Mining The Knowledge Community"

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