Design verification engineer

2 weeks ago

Bangalore City, India ConnectPro Management Consultants Pvt Ltd Full time

1. Staff Design Verification Engineer Bangalore /Full-Time /On-site Role Summary As a senior member of the DSP Design Verification team, you will be playing a significant role in verifying the DSP design for new breeds of So C and FPGA for advanced perception applications utilizing 4-D Lidar. You will closely work with verification architects to define and develop verification environments for block, subsystem, and full-chip using constrained random verification techniques and verify complex DSP designs. What you'll be doing: Responsible for verifying state-of-art DSP design at block, subsystems, and full-chip level verification environments. Define and develop testbenches, constrained random verification environments, reference models, and scoreboards using System Verilog and UVM methodologies Built self-checking environment using C/C++ reference models and DPI flow Verify DSP blocks against bit-accurate C/C++ reference models Define and execute verification plan for IP, block, subsystem, and full-chip using SV/UVM methodology Work in a dynamic and fast-paced startup environment and work closely with a team of passionate engineers to enhance the existing processes, methodology, and tools to verify complex DSP and So Cs. Identify and write functional coverage groups to improve test/stimulus quality Through coverage, analysis to identify verification gaps and achieve 100% coverage closure Work with the functional leads and cross-functional teams to ensure high-quality DSP IP delivery on time What you'll have:12+ years of experience in the design, verification & validation of complex IPs, SOCs Experience in verifying DSP design in advance5+ years in architecting and building constrained random verification environments, reference models, scoreboards, and directed self-checking tests using SV/UVM methodologies Solid programming skills in System Verilog, UVM, C/C++, Perl/Python. Proficient in debugging complex IP and SOC designs Excellent verbal and written communication skills Ability to collaborate deeply with cross-functional leads and management teams Ability to deliver results in a very fast-moving environment Desire to learn & implement groundbreaking new processes and methodology for continuous verification improvement Nice to have: Experience in developing C/C++ reference models and with Verilog DPI flow Experience in pre-silicon validation on emulation platforms such as Cadence Palladium, Mentor Veloce, Synopsys Zebu Post-silicon bring-up and validation planning and execution Experience with test plan building tools like Vmanager. Experience with DFT verification.2. Staff So C Verification Engineer Bangalore /Full-Time /On-site. Role Summary As a senior member of the SOC Verification team, you will lead a team of verification engineers and verify new breeds of So C for advanced perception applications utilizing 4-D Lidar. You will architect and develop verification environments for block, subsystem, and full-chip using state-of-art verification techniques, and verify complex So C designs. What you'll be doing: Lead and drive block, subsystems, and full-chip verification of advanced ARM-based SOCs. Architect and build test benches, reference models, and scoreboards using System Verilog and UVM-constrained random methodologies Define and execute test plan for block, subsystem, and full-chip using SV/UVM and C/C++ FW running on the on-chip ARM processors Work in a dynamic and fast-paced startup environment and work closely with a team of passionate engineers to define and enhance the processes, methodology, and tools to verify complex So Cs. Work with Architects, design and verification, and system software teams to define system-level verification plans and prove that SOC meets the functional, performance, and power target defined in the architecture and design specs. Identify and write functional coverage groups to improve test/stimulus quality Through coverage, analysis to identify verification gaps and achieve 100% coverage closure Work with the different stakeholders and cross-functional leads to ensure high-quality So C delivery on time What you'll have:10+ years of experience in design, verification, and validation of advanced ARM based SOCs5+ years in architecting and building constrained random verification environments, reference models, scoreboards, and directed self-checking tests using System Verilog and UVM methodologies Deep understanding of ARM-based SOC verification. Writing assembly and C/C++ diagnostic firmware for embedded ARM processors and debugging in a simulation environment Working experience and knowledge in AMBA protocols, Core Sight Debugger, LPDDR, Ethernet, MIPI, and high-speed serdes, etc. Solid programming skills in System Verilog, UVM, C/C++, assembly, Perl/Python. Proficient in debugging complex SOC or CPU core designs Excellent verbal and written communication skills Ability to collaborate deeply with cross-functional leads and management teams Ability to deliver results in a very fast-moving environment Desire to learn & implement groundbreaking new processes and methodology for continuous verification improvement Nice to haves: Diagnostics Firmware development and validation Experience in pre-silicon validation on emulation platforms such as Cadence Palladium, Mentor Veloce, Synopsys Zebu Post-silicon bring-up and validation planning and execution

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