 
						DFT Engineer
4 days ago
Job Title: DFT Engineer Experience Level: 4+ years Location: Hyderabad/Banglaore Job Description: Key Responsibilities: Develop and implement DFT architecture and methodologies for ASIC/SoC designs. Insert and verify scan chains (scan insertion, ATPG, scan stitching). Implement MBIST/Logic BIST using industry-standard tools and flows. Work on boundary scan (IEEE 1149.1), JTAG implementation and validation. Create and validate test patterns (ATPG) for stuck-at, transition faults, and path delay faults. Work with RTL, synthesis, and physical design teams to ensure DFT compliance. Perform fault simulations, coverage analysis, and debug test pattern issues. Support silicon bring-up, ATE test development, and yield enhancement. Deliver final test models and documentation for production testing. Required Skills and Experience: B.E/B.Tech or M.E/M.Tech in Electronics, Electrical, or VLSI Design. 4+ years of hands-on experience in DFT for complex ASIC or SoC projects. Strong knowledge of scan insertion, ATPG, MBIST, and boundary scan techniques. Experience with industry tools such as: DFT Tools: Synopsys DFT Compiler, Tetramax, TetraMAX II, Siemens Tessent MBIST Tools: Synopsys TestMAX/DFTMAX, Tessent MBIST Simulation/Debug: Verilog/VHDL, ModelSim, VCS, or Questa Understanding of STA and timing constraints related to DFT insertion. Familiarity with scripting languages like Python, Perl, or Tcl. Solid understanding of digital design concepts and RTL design. Preferred Qualifications: Exposure to ATE (Automatic Test Equipment) patterns and test flow development. Experience in hierarchical DFT, RTL-level DFT insertion, and low-power DFT design. Knowledge of IEEE standards (1149.1, 1500, 1687). Good communication, teamwork, and problem-solving skills. Why Join Us? Work on cutting-edge DFT for advanced semiconductor nodes. Join a dynamic team in a fast-paced, innovation-driven environment. Competitive compensation and opportunities for career growth. Interested can CV to
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					  DFT Engineer2 weeks ago 
 bangalore, India Ms Angel and Genie (Talent Search Company) Full timeJob DescriptionWe are looking for an energetic, passionate and process oriented DFT Engineers who has extensive experience in planning, implementation and verification of DFT features for multiple SoC.Direct Responsibilities of the role, but not limited to,working on various aspects of IP and SoC DFT including the DFT Architecture, Spyglass DFT, RTL... 
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					  Dft engineer3 weeks ago 
 Bangalore, India Ms Angel And Genie Full timeJob Description We are looking for an energetic, passionate and process oriented DFT Engineers who has extensive experience in planning, implementation and verification of DFT features for multiple So C. Direct Responsibilities of the role, but not limited to, working on various aspects of IP and So C DFT including the DFT Architecture, Spyglass DFT, RTL... 
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					  DFT Engineer4 hours ago 
 Bangalore, India ACL Digital Full timeDFT Engineer Location : Bangalore Notice Period: 30 days Job Description: We are looking for a skilled DFT Engineer with 3–5 years of experience in ASIC design and verification with a strong focus on Design-for-Test methodologies. You will be responsible for implementing and verifying DFT architectures to ensure high test coverage and manufacturability.... 
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					  DFT Engineer1 week ago 
 bangalore, India Canvendor Full time#Urgent_Opening_for_Canvendor #Hiring: DFT Engineer (3+ Years Experience) |Bangalore| Immediate Joiners Preferred Location: Bangalore, India Experience: 3-8 Years Notice period: Immediate to 30days Mandatory: DFT, ATPG, Scan Insertion, EDA Tools #Key_Requirements: DFT Fundamentals including JTAG, Scan, ATPG, IEEE 1687 iJTAG, EDT Architecture Scan Insertion... 
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					  DFT Engineer4 days ago 
 Bangalore, India Canvendor Full time#Hiring : DFT Engineer (3+ Years Experience) |Bangalore| Immediate Joiners Preferred Location: Bangalore, India Experience: 3-8 Years Notice period: Immediate to 30days Mandatory: DFT, ATPG, Scan Insertion, EDA Tools DFT Fundamentals including JTAG, Scan, ATPG, IEEE 1687 iJTAG, EDT Architecture Scan Insertion using Fusion Compiler or other EDA tools ATPG... 
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					  Lead DFT Engineer7 days ago 
 bangalore, India ACL Digital Full timeJob Title: Lead DFT Engineer Experience: 7+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / ASIC / SoC Design Job Summary: We are looking for a Lead DFT Engineer to drive DFT architecture, planning, and implementation across complex SoC/ASIC designs. As a technical leader, you will mentor junior engineers, collaborate with... 
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					  DFT Engineer7 days ago 
 bangalore, India ScaleFlux Full timeJob Title: DFT Lead Location: Bangalore, Karnataka, India. Company and Candidature Brief: At ScaleFlux, we are a family unit powered by diversity, inclusion, transparency, respect, integrity, and passion—for both our clients and our people. Our business growth depends on your professional development, as we collaborate, share ideas and innovations, and... 
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					  DFT Engineer2 weeks ago 
 bangalore, India UST Full timeThe DFT Engineer will focus on developing and implementing Design for Test strategies and techniques to test the complex IoT products which has WIFI & Blue tooth combo devices. He will work closely with design and backend, verification teams to ensure robust testing mechanisms and improve overall product quality and reliability. Responsibilities Develop and... 
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					  Senior DFT Engineer1 week ago 
 bangalore, India L&T Technology Services Full timeL&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience. Job Location : Bangalore Skills Expertise should be : ATPG, SOC, ASIC DFT. 
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					  DFT Engineer1 day ago 
 bangalore district, India Canvendor Full time#Hiring : DFT Engineer (3+ Years Experience) |Bangalore| Immediate Joiners Preferred Location: Bangalore, India Experience: 3-8 Years Notice period: Immediate to 30days Mandatory: DFT, ATPG, Scan Insertion, EDA Tools DFT Fundamentals including JTAG, Scan, ATPG, IEEE 1687 iJTAG, EDT Architecture Scan Insertion using Fusion Compiler or other EDA tools ATPG...