Principal Low Power Verification Engineer
1 month ago
Principal / Senior Staff /Staff Low Power Verification
Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad
A US based well-funded product-based startup looking for highly talented Verification Engineers for the following roles .
Principal / Senior Staff /Staff Low Power Verification
- SoC Verification +
- Experience in defining and verifying Low power sequences at SoC level including clock and power gating
- Experience in different low power boot, sleep and recovery modes
7-12 years of experience in working on SoC verification environments.
- Collaborate with design, applications, product and test engineering teams to ensure the implementation meets both architectural and micro-architectural intent for complex IPs and feature areas of subsystem and SoC.
- Experience in CPU(preferably ARM) based verification, C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.)
- Exposure to all stages of verification requirements collection, creation of test plans, testbench implementation, test cases development, documentation and support.
- Experience in verification of SoC Debug components - DAP, Trace, ELA etc
- Experienced in one or many of these technologies/ protocols – DDR, HBM, PCIe, CXL, Ethernet, Coherent Interconnects and RAS.
- System understanding of IOMMU and Interrupt Controllers.
- Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools and Debuggers.
Contact:
Uday
Mulya Technologies
"Mining The Knowledge Community"
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Principal low power verification engineer
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