Senior Design/Verification Engineer
1 week ago
Job Title: IP/SOC Verification Engineer Experience: 5+ Years Tessolve Semiconductor Immediate to 30 Days Employment Type: Full-time / Permanent Tessolve Semiconductor, part of the Hero Group, is a leading engineering services company offering end-to-end silicon and system design solutions. Tessolve provides expertise across ASIC design, verification, post-silicon validation, and embedded software development — enabling customers to accelerate product development from concept to production. Tessolve is looking for an experienced IP/SOC Verification Engineer with strong hands-on experience in SystemVerilog/UVM-based functional verification . The candidate will contribute to verification planning, testbench development, simulation, and debug activities for complex IP and SoC designs. Analyze simulation failures, debug issues, and work closely with design teams for root cause analysis. Participate in design/verification reviews and contribute to methodology improvements. B.E/B.Tech/M.Tech in Electronics, Electrical, or Computer Engineering. ~5+ years of hands-on experience in IP/SOC functional verification . ~ Strong experience in SystemVerilog, UVM methodology , and verification environments. ~ In-depth understanding of SoC architecture, bus protocols (AXI, AHB, APB, PCIe, DDR, USB, etc.). ~ Experience with coverage-driven verification , regressions, and scripting (Python/Perl/TCL). ~ Experience with SoC integration, emulation, or FPGA prototyping . Work on cutting-edge SoC and IP verification projects with leading semiconductor clients. Immediate joiners preferred (0–30 days).
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Senior Engineer, Design Verification Engineering
2 weeks ago
Bangalore, India ACL Digital Full timeSenior Design verification Engineer Mandatory Skill : PCIE Experience : 5 years Design Verification Engineer responsible for ensuring functional correctness of ASIC/SoC designs. Key Task: Develop and execute verification plans for complex digital designs. Coverage: Achieve functional and code coverage targets through constrained random and directed testing....
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Senior Design Verification Lead
1 week ago
bangalore, India HCLTech Full timeHello VLSI folks!HCL Engineering - Semiconductor - Hiring Design Verification Engineer (Senior Level - 5 to 20Years years’ experience) - Chennai, Bangalore.Interested aspirants could email your profile to magenderan.r@hcltech.com /Call 8050996119.We will discuss in details on the job profile & responsibilities.Company: HCL TechJob Summary:We are seeking a...
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Verification Lead Design Engineer
1 week ago
bangalore, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. 5+ years of Design Verification experience with SV/UVM Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. Design Verification experience verifying complex designs...
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Senior Design Verification Lead
4 hours ago
bangalore, India HCLTech Full timeHello VLSI folks! HCL Engineering - Semiconductor - Hiring Design Verification Engineer (Senior Level - 5 to 20Years years’ experience) - Chennai, Bangalore. Interested aspirants could email your profile to /Call .We will discuss in details on the job profile & responsibilities. Company: HCL Tech Job Summary: We are seeking a highly accomplished Design...
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Senior Engineer, Design Verification Engineering
2 weeks ago
Bangalore, India ACL Digital Full timeSenior Design Verification Engineer Experience: 4 to 10 Years. Perform verification of complex digital designs at block and system level. Work closely with RTL design and architecture teams to identify issues. Experience with scripting languages like Python, Perl, or Tcl. Bachelor’s or Master’s degree in Electronics, Electrical, or related field. ACL...
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Senior Digital Verification Engineer
1 day ago
bangalore, India Omni Design Technologies Full timeWe are looking for an experienced digital verification engineer, who is capable of driving the required verification flows for our mixed-signal designs. The ability to work closely with rtl design team and the analog team, and to develop detailed verification flows, is a key feature of this role QualificationsYou will be part of a Verification Team.You will...
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Senior Design Verification Engineer
1 week ago
bangalore, India L&T Technology Services Full timeL&T Technology is looking to hire for Design Verification Engineers. Job Location : Bangalore Detailed JD is below ::Job Description DV Positions: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to...
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Senior Design Verification Engineer
2 weeks ago
bangalore, India ACL Digital Full timeJD: This role requires expertise in PCIe, CPU, Ethernet, CXL, DDR, and RISC-V technologies. Key Responsibilities: Develop and execute verification plans for hardware designs incorporating PCIe, Ethernet, CXL, DDR, and RISC-V technologies. Design and implement verification environments using SystemVerilog and UVM methodologies. Develop test cases to validate...
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Senior Design Verification Engineer
1 week ago
bangalore, India L&T Technology Services Full timeJob Description DV Positions: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause and resolve...
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Senior Design Verification Engineer
2 weeks ago
bangalore, India L&T Technology Services Full timeJob Description DV Positions: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause and resolve...
