Perl scripting

Exp 5-8Yrs relevant Location- Germany Deliverables and Results: Timing and power Signoff data Digital timing and power sign-off guidelines Reports, analysis and scripts (perl/python) to improve Methodology Requirements: A sound knowledge in digital chip design including timing, power and IR drop analysis and verification as well as functional simulation Deep...

As a Chief Power Optimization Specialist, you will be responsible for spearheading power convergence initiatives. You will work closely with the team to achieve efficient power management using Python, Perl, and PTPX scripting.Key Responsibilities:Spearhead Power Convergence InitiativesOptimize IPs at the System-on-Chip LevelDevelop Automation Scripts for...

Responsibilities:- Block/SOC-level Physical Design from Netlist to GDSII including floorplanning, power planning, placement, CTS, routing, extraction, and DFM.- Perform congestion, timing, IR/EM, power and QoR analysis and drive closure.- Execute sign-off flows: STA, DRC/LVS, Antenna/ERC, LEC, and ECO (timing & functional).- Implement ECOs and ensure...

Role: Design Verification Engineer Experience: 5 to 15 Years Location: Bengaluru Job Description: You will be part of the team verifying IPs and SoCs leading to first Si success. Manage and lead a team of Verification engineers IP verification is coverage driven using latest industry standard methodologies and HVLs. Work involves defining verification...

Job OverviewThis role supports high-performance compute environments used in silicon design by optimizing IT infrastructure.You'll collaborate with teams to ensure resources are provisioned, maintained, and tailored to engineering needs.Key ResponsibilitiesCoordinate with teams to provision and manage servers, storage, and infrastructure upgradesMonitor and...

6+ years of experience in ASIC/SOC/IP Verification using SystemVerilog and UVM/OVM methodologies. · Skilled in automation scripting (Python/Perl/Shell) and regression management. · Excellent in verification planning, issue tracking, and collaboration with cross-functional teams.

Large Design Servicess Organization with more than 1000 employeesLOCATION: GREATER BENGALURU AREA Lead DV - Power Convergence8+yrsPower Convergence activities, focusing on power attainment and optimization of IPs at the SoC level. Proficiency in Python, Perl, and PTPX scripting is essential for automation, analysis, and achieving efficient power convergence....

Large Design Servicess Organization with more than 1000 employees LOCATION: GREATER BENGALURU AREA Lead DV - Power Convergence 8+yrs Power Convergence activities, focusing on power attainment and optimization of IPs at the SoC level. Proficiency in Python, Perl, and PTPX scripting is essential for automation, analysis, and achieving efficient power...

About the RoleThis is a hybrid IT role supporting semiconductor development workflows. It sits between traditional IT and engineering, focusing on optimizing infrastructure for high-performance compute environments used in silicon design. You’ll collaborate with internal teams to ensure compute, storage, and networking resources are provisioned,...

Job Title:Senior Physical Design EngineerJob Description:Block/SOC-level physical design from netlist to GDSII including floorplanning, power planning, placement, CTS, routing, extraction, and DFM.Perform congestion, timing, IR/EM, power and QoR analysis and drive closure.Execute sign-off flows: STA, DRC/LVS, Antenna/ERC, LEC, and ECO (timing &...