Senior Engineer, Design Verification Engineering

16 hours ago


Hyderabad, India BrainChip Full time
This is a full-time role for a Senior Design Verification Engineer for Brainchip’s Hyderabad, India Office. Key tasks include debugging, ensuring designs meet customer requirements, documenting verification plans, and collaborating with cross-functional teams to improve the verification process.
Responsible for verifying the ASIC design, architecture and micro-architecture using advanced verification methodologies.
Expected to understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.
B.Tech/M.Tech. with 5-10 years of relevant experience.
Experience in verification of complex IPs/units and sub-systems.
Verification experience using random stimulus along with functional coverage and assertion-based verification methodologies.
Knowledge in System Verilog or similar hardware verification language.
Experience with System Verilog Assertion (SVA) a plus.
Experience with Perl, Python or other scripting language is a plus
Experience with Industry Standard protocols like I2C/SPI/GPIO/AXI/APB/AHB is a plus

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