RTL design Engineer
4 weeks ago
JD:
Design RTL ASIC Engineer
Location: Bangalore,HYD and Noida
Experience :- 5 to 20 Years
Experience and Skills Required
5 to 20 years of experience in SoC/IP Design.
Expertise in Writing Detailed IP Specifications, Micro Architecture, IP design, Subsystem and SoC level integration.
Expertise on RTL Development. Follow Coding Standards, expertise on Lint, CDC tools, Verification and Debugging of test cases, code and functional coverage analysis.
In-depth knowledge of Clocking Methodology, Low Power Implementation.
Hands on experience on writing constraints and exceptions, performing Synthesis, Timing Analysis and Design for Test Implementation.
Experience of power partitioning and usage of CPF/UPF.
Exposure to IP Design for ARM Microcontrollers based SoCs.
Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB).
Knowledge of one or more of the interface protocols, PCIe, DDR, Ethernet, I2C, UART, SPI.
Experience in Matlab Simulations and Implementing Signal Processing IPs like Digital Filters, Math Functions or FFT engines.
Experience in developing Security IPs for various Encryption standards.
Experience in implementing On-chip Memory and Flash controllers.
Kindly share updated CV to or connect on 6361542656 And Refer
Disclaimer :
At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating an inclusive environment where all employees, regardless of their race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.
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