Senior/ Principal Digital Design Engineer

3 days ago


Hyderabad, India Mulya Technologies Full time
Senior Principal Logic Design Engineer Location: We are a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing

As a SPE Logic Design Engineer, you’ll play a pivotal role in designing and implementing the world’s best Registered Clocking Driver (RCD) products. In this full-time role, you’ll report directly to our Logic Design Manager. Our MIC IDC is dedicated to leverage over three decades of high-performance memory expertise to deliver cutting-edge memory interface chipset solutions, enhancing memory bandwidth and capacity for data centers and client applications alike, and your contributions will be instrumental in RCD product development.

We offer a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.

Realize the RTL design using Verilog/System Verilog.
Does pre implementation design checks like lint, CDC, RDC, constraint validation.
Works with physical design team in defining the design and timing constraints and driving implementation till timing closure.
Minimum 15 years of solid ASIC logic/Digital design expertise with bachelor’s degree or master’s degree
Strong digital design fundamentals.
Experience with EDA tools for simulation, synthesis, and timing analysis and logic equivalence check.
Strong scripting abilities using Perl/Tcl/python is a plus
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